LTC4257
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APPLICATIO S I FOR ATIO
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However, if the standard diode bridge is replaced with a
Schottky bridge, the transition points between modes will
be affected. The application circuit (Figure 11) shows a
technique for using Schottky diodes while maintaining
proper threshold points to meet IEEE 802.3af compliance.
Auxiliary Power Source
In some applications, it may be desirable to power the PD
from an auxiliary power source such as a wall transformer.
The auxiliary power can be injected into the PD at several
locations and various trade-offs exist. Power can be
injected at the 3.3V or 5V output of the isolated power
supply with the use of a diode ORing circuit. This method
accesses the internal circuits of the PD after the isolation
barrier and therefore meets the 802.3af isolation safety
requirements for the wall transformer jack on the PD.
Power can also be injected into the PD interface portion of
the LT4257. In this case, it is necessary to ensure the user
cannot access the terminals of the wall transformer jack
on the PD since this would compromise the 802.3af
isolation safety requirements. Figure 9 demonstrates three
methods of diode ORing external power into a PD. Option
1 inserts power before the LTC4257 while options 2 and 3
insert power after the LTC4257.
If power is inserted before the LTC4257 (option 1), it is
necessary for the wall transformer to exceed the LTC4257
UVLO turn-on requirement and limit the maximum voltage
to 57V. This option provides input current limiting for the
transformer, provides valid power good signaling and sim-
plifies power priority issues. As long as the wall transformer
applies power to the PD before the PSE, it will take priority
and the PSE will not power up the PD because the wall power
will corrupt the 25k signature. If the PSE is already pow-
ering the PD, the wall transformer power will be in parallel
with the PSE. In this case, priority will be given to the higher
supply voltage. If the wall transformer voltage is higher, the
PSE should remove line voltage since no current will be
drawn from the PSE. On the other hand, if the wall trans-
former voltage is lower, the PSE will continue to supply
power to the PD and the wall transformer power will not be
used. Proper operation should occur in either scenario.
Auxiliary power can be applied after the LTC4257 as shown
in option 2. In this configuration, the wall transformer does
not need to exceed the LTC4257 turn-on UVLO requirement;
however, it is necessary to include diode D9 to prevent the
transformer from applying power to the LTC4257. The
transformer voltage requirements will be governed by the
needs of the PD switcher and may exceed 57V. However,
power priority issues require more intervention. If the wall
transformer voltage is below the PSE voltage, then priority
will be given to the PSE power. The PD will draw power from
the PSE while the transformer will sit unused. This configu-
ration is not a problem in a PoE system. On the other hand,
if the wall transformer voltage is higher than the PSE volt-
age, the PD will draw power from the transformer. In this
situation, it is necessary to address the issue of power
cycling that may occur if a PSE is present. The PSE will detect
the PD and apply power. If the PD is being powered by the
wall transformer, then the PD will not meet the minimum
load requirement and the PSE will subsequently remove
power. The PSE will again detect the PD and power cycling
will start. With a transformer voltage above the PSE volt-
age, it is necessary to install a minimum load on the output
of the LTC4257 to prevent power cycling. Refer to the
LTC4257-1 data sheet for an alternative implementation of
option 2 which uses the Signature Disable feature.
The third option also applies power after the LTC4257, while
omitting diode D9. With the diode omitted, the transformer
voltage is applied to the LTC4257 in addition to the load.
For this reason, it is necessary to ensure that the transformer
maintain the voltage between 44V and 57V to keep the
LTC4257 in its normal operating range. The third option has
the advantage of automatically disabling the 25k signature
when the external voltage exceeds the PSE voltage.
