ADL5315
Rev. 0 | Page 12 of 20
TRANSLINEAR LOG AMP INTERFACING
The mirror current output, IOUT, of the ADL5315 is designed
to interface directly to an Analog Devices translinear
logarithmic amplifier, such as the
AD8304, AD8305, or
ADL5306.
Figure 24 shows the basic connections necessary for interfacing
the ADL5315 to the AD8305. In this configuration, the designer
can use the full current mirror range of the ADL5315 for high
accuracy power monitoring.
The measured rms noise voltage at the output of the AD8305 vs.
the input current is shown in
Figure 23, both for the AD8305 by
itself and in cascade with the ADL5315. The relatively low noise
produced by the ADL5315, combined with the additional noise
filtering inherent in the frequency response characteristics of
the AD8305, results in minimal degradation to the noise
performance of the AD8305.
Careful consideration should be made to the layout of the
circuit board in this configuration. Leakage current paths in the
board itself could lead to measurement errors at the output of
the translinear log amp, particularly when measuring the low
end of the ADL5315’s dynamic range. It is recommended that
when designing such an interface that a guard potential be used
to minimize this leakage. This can be done by connecting the
translinear log amps VSUM pin to the NC pin of the ADL5315,
with the VSUM guard trace running on both sides of the IOUT
trace. Additional details on using VSUM can be found in the
AD8304 or AD8305 data sheets. The VSET pin of the ADL5315
can be used in a similar fashion to guard the INPT trace.
5.5m
0
1n
1m
I
INPT
(A)
NOISE (V rms)
5.0m
4.5m
4.0m
3.5m
3.0m
2.5m
2.0m
1.5m
1.0m
0.5m
10n 100n 1μ 10μ 100μ
05694-012
AD8305 AND
ADL5315
AD8305 ONLY
Figure 23. Measured RMS Noise of AD8305 vs. AD8305
Cascaded with ADL5315
VOLTAGE
REFERENCE
CURRENT
LIMITING
COMM
VSET NC
INPT
DATA PATH
AD8305 INPUT
COMPENSATION
NETWORK
I
PD
CURRENT
MIRROR
1:1
ADL5315
4
2 7
SREF
3
1
6
VPOS
PIN
20kΩ
5
RLIM
R
LIM
I
LIM =
1mA – 16mA
3V TO 12V
8
IOUT
I
PD
TIA
1
2
3
4
11
SCAL
12
VOUT
10
BFIN
9
VLOG
5
VSUM
6
VNEG
7
VNEG
8
VPOS
15
COMM
16
COM
M
14
COMM
13
COMM
AD8305
VRDZ
VREF
IREF
INPT
OUTPUT
V
OUT
= 0.2 × LOG
10
(I
PDM
/1nA)
200kΩ
2kΩ
4.7nF
1nF
1kΩ
0.1μF
05694-011
C
SET
V
POS
R
LIM
= 48V
I
LIM
– 3kΩ
Figure 24. Interfacing the ADL5315 to the AD8305 for High Accuracy PIN Power Monitoring
ADL5315
Rev. 0 | Page 13 of 20
EXTENDED OPERATING RANGE
The ADL5315 is specified over an input current range of 3 nA
to 3 mA, but the device remains fully functional over the full
eight decade range specified for ADI’s flagship translinear
logarithmic amplifier, the
AD8304 (100 pA to 10 mA). Figure
25
and Figure 26 show the performance of the ADL5315 for this
extended operating range vs. various temperature and supply
conditions.
This extended dynamic range capability allows the ADL5315 to
be used in optical power measurement systems, precision test
equipment, or any other system that requires accurate, high
dynamic range current monitoring.
2.0
–2.0
1n100p
10m
I
INPT
(A)
LINEARITY (%)
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
10m
1n
I
OUT
(A)
1m
100μ
10μ
1μ
100n
10n
100p
10n 100n 1μ 10μ 100μ 1m
–40°C
+25°C
+70°C
+85°C
0°C
+25°C, +70°C, +85°C,
0°C, –40°C
05694-030
Figure 25. Extended Operating Range of 100 pA to 10 mA for Multiple
Temperatures, Normalized to 25°C and I
INPT
= 3 µA
2.0
–2.0
1n 10m
I
INPT
(A)
LINEARITY (%)
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
10m
1n
I
OUT
(A)
1m
100μ
10μ
1μ
100n
100p
10n
10n 100n100p 1μ 10μ 100μ 1m
I
INPT
VS. I
OUT
, ALL
VOLTAGE CONDITIONS
V
POS
= 2.7V, V
SET
= V
SREF
V
POS
= 5V, V
SET
= 2V
V
POS
= 5V, V
SET
= V
SREF
V
POS
= 8V, V
SET
= 2V
V
POS
= 8V, V
SET
= V
SREF
05694-031
Figure 26. Extended Operating Range of 100 pA to 10 mA for Multiple Supply
Conditions, Normalized to V
POS
= 5 V, V
SET
= V
SREF
and I
INPT
= 3 µA
USING RLIM AS A SECONDARY MONITOR
The RLIM pin can be used as a secondary linear output for
monitoring input currents near the upper end of the ADL5315
current range. The RLIM pin sinks a current approximately
equal to I
INPT
/40. The voltage generated by this current through
the series combination of an internal 3 kΩ resistor and the
external R
LIM
is compared to a 1.2 V threshold and fed back to
the mirror bias to limit I
INPT
.
Figure 27 shows the equivalent circuit and one method for
using RLIM to form a V
SET
bias proportional to I
INPT
, also
referred to as automatic photodiode biasing. This configuration
is useful in PIN photodiode systems to compensate for photo-
diode equivalent series resistance (ESR) while maintaining low
reverse bias at low signal levels to minimize dark current.
Choosing R2 >> R
LIM
minimizes impact on I
LIM
and allows
the resistor ratio, R2/R1, to be calculated based on maximum
photodiode ESR using the following simplified equation.
R3R1RR2
R
R40
R1
R2
LIM
LI
M
PDmax
=>>= ,,
where
R
PDmax
is the maximum ESR of the photodiode.
For zero bias at zero input current, the sum of R
LIM
and R3 must
equal R1. For positive bias at zero input current, the sum of R
LIM
and R3 should be greater than R1. The ratio of V
POS
to V
SET
varies directly.
For example, choosing R
LIM
= 1.82 kΩ (10 mA I
LIM
),
R2 = 100 kΩ, and R1 = 18.2 kΩ compensates for photodiode
ESR up to 250 Ω.
A simple low voltage drop current mirror with a load resistor
can replace the differential amplifier shown in
Figure 27,
although the resulting input current limit is less accurate and
will vary with temperature.
VPOS
MIRROR
BIAS
05964-035
1.2V
R2R2
3kΩ
RLIM
RLIM
VSET
R3R1
I
INPT
/40
V
POS
Figure 27. Providing Automatic Photodiode Voltage Biasing Using RLIM Pin
ADL5315
Rev. 0 | Page 14 of 20
10m1μ 10μ 100μ 1m
2.2
0
100p 1n
I
INPT
(A)
V
SET
VOLTAGE (V)
05694-036
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
10n 100n
Figure 28. V
SET
Voltage vs. I
INPT
when
RLIM Is Configured for Automatic Photodiode Biasing
2.2
0
021
1098
I
INPT
(mA)
V
SET
VOLTAGE (V)
1.4
1.6
1.8
2.0
1.2
0.2
0.4
0.6
0.8
1.0
34 5 67
05694-037
Figure 29. V
SET
Voltage vs. I
INPT
when
RLIM Is Configured for Automatic Photodiode Biasing
Figure 28 and Figure 29 show the performance of the circuit in
Figure 27. The reverse bias across the photodiode is held at a
low value for small input currents to minimize dark current.
The V
SET
voltage increases in a linear manner at the higher input
currents to maintain accurate photodiode responsivity. The
minimum bias level for the configuration above is ~200 mV.
CHARACTERIZATION METHODS
During characterization, the ADL5315 was treated as a
precision 1:1 current mirror. To make accurate measurements
throughout the six-decade current range, calibrated Keithley
236 current sources were used to create and measure the test
currents. Measurements at low currents are very susceptible to
leakage to the ground plane. To minimize leakage on the
characterization board, the VSET pin is connected to traces that
buffer V
INPT
from ground. These traces are connected to the
triax guard connector to provide buffering along the cabling.
The primary characterization setup shown in
Figure 30 is used
to perform all static measurements, including mirror linearity
between I
INPT
and I
OUT
, V
INPT
variation vs. I
INPT
, supply current, and
I
INPT
current limiting. Component selection of the characterization
board is similar to that of the evaluation board, except that triax
connectors are used instead of SMA. To measure pulse response,
noise, and small signal bandwidth, more specialized test setups
are used.
KEITHLEY 236
KEITHLEY 236
05694-025
ADL5315
CHARACTERIZATION BOARD
VPOS VSET SREF COMM
IOUT
DC SUPPLIES/DMM
INPT
Figure 30. Primary Characterization Setup
The setup in Figure 31 is used to measure the output current
noise of the ADL5315. Batteries are used in numerous places to
minimize introduced noise and remove the uncertainty
resulting from the use of multiple dc supplies. In application,
properly bypassed dc supplies provide similar results. The load
resistor is chosen for each current to maximize signal-to-noise
ratio while maintaining measurement system bandwidth (when
combined with the low capacitance JFET buffer). The custom
LNA is used to overcome noise floor limitations in the
HP89410A signal analyzer.

ADL5315ACPZ-R7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Current & Power Monitors & Regulators 5V Current Mirror
Lifecycle:
New from this manufacturer.
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