ADL5315
Rev. 0 | Page 15 of 20
05694-028
R
INPUT
FET BUFFER
VECTOR SIGNAL
ANALYZER
HP89410A
ADL5315
VPOS SREF VSET
+12V
–12V
INPT IOUT
R
LOAD
2.2nF
LNA
1.5V
+
+
1.5V
9V
+
1.5V
+
+
9V
Figure 31. Configuration for Noise Spectral Density and Wideband Current Noise
Figure 32 shows the configuration used to measure the pulse
response of I
INPT
to I
OUT
. To create the test current pulse, Q1 is
used in a common base configuration with the Agilent 33250A
pulse generator. The output of the 33250A is a negative biased
square wave with an amplitude that results in a one decade
current step at I
OUT
.
R
C
is chosen according to what current range is desired. For
30 µA and lower, the
AD8067 FET input op amp is used in a
transimpedance amplifier configuration to allow for viewing on
the TDS5104 oscilloscope. For signals greater than 30 µA, the
ADA4899-1 replaced the AD8067 to avoid limiting the
bandwidth of the ADL5315.
The configuration in
Figure 33 is used to measure V
INPT
while
V
SET
is pulsed. Q1 and R
C
are used to generate the operating
current on the INPT pin. An Agilent 33250A pulse generator is
used on the VSET pin to create a 0.0 V to 4.0 V square wave.
The setup in
Figure 34 was used to measure the small signal ac
response from I
INPT
to I
OUT
. The AD8138 differential amplifier
was used to couple the ac and dc signals together. The ac signal
was modulated to a depth of 5% of full scale over frequency.
The voltage across R
F
sets the dc operating point of I
INPT
. The
values of R
F
are chosen to result in decade changes in I
INPT
. The
ADA4899-1 op amp is used as a transimpedance amplifier for
all current conditions.
TDS5104
OSCILLOSCOPE
ADL5315
EVALUATION BOARD
INPT
VPOS VSET SREF COMM
IOUT
DC SUPPLIES/DMM
R
C
R
C
AGILENT 33250A
PULSE GENERATOR
Q1
05694-024
Figure 32. Configuration for Pulse Response of I
INPT
to I
OUT
05694-026
R
C
Q1
TDS5104
OSCILLOSCOPE
ADL5315
EVALUATION BOARD
VPOS SREF COMM
IOUT
DC SUPPLIES/DMM
INPT
VSET
AGILENT 33250A
PULSE GENERATOR
KEITHLEY 236
Figure 33. Configuration for Pulse Response from V
SET
to V
INPT
NETWORK ANALYZER
OUTPUT R BA
POWER
SPLITTER
AD8138
EVAL BOARD
++
––
ADL5315
EVALUATION BOARD
INPT
50Ω
05694-027
IOUT
R
F
R
F
VPOS VSET SREF COMM
DC SUPPLIES/DMM
Figure 34. Configuration for Small-Signal AC Response
ADL5315
Rev. 0 | Page 16 of 20
EVALUATION BOARD
ADL5315
INPTI
PD
SREF VPOS V
POS
V
SET
COMM
1
3 6
VSET
2
4
7
NC
8
IOUT I
OUT
5
RLIM
GND
SW1
R3
0Ω
L1
0Ω
C2
0.01μF
C1
0.01μF
C3
390pF
C4
OPEN
R5
OPEN
R2
10kΩ
S
REF
R4
4kΩ
R1
100Ω
05694-013
Figure 35. Evaluation Board Schematic (Rev. A)
Table 4. Evaluation Board (Rev. A) Configuration Options
Component Function Default Conditions
VPOS, GND Supply and ground connections. Not applicable
INPUT, L1, C4
Input Interface: The evaluation board is configured to accept an input current at the
SMA connector labeled INPUT. Filtering of this current can be done using L1 and C4.
L1 = 0 Ω (size 0805)
C4 = open (size 00603)
R4, C3 Input Compensation. Provides essential HF compensation at the INPT pin. C3 = 390 pF (size 0805)
R4 = 4.02 kΩ (size 0402)
SREF, VSET, SW1,
R1, R6, R7
INPT Bias Voltage. The dc voltage applied to VSET determines the voltage at INPT,
V
SET
= V
INPT
. Connecting SREF to VSET sets the bias at INPT to be 1 V below V
POS
.
Opening SW1 allows for VSET to be driven externally via the SMA connector.
SW1 = closed
R1 = 100 Ω (size 0402)
R6 = R7 = 0 Ω (size 0402)
IOUT, R5
Output/Mirror Current Interface: The output current at the SMA connector labeled IOUT is
equal to the value at INPT. R5 allows a resistor to be installed for applications where a
scaled voltage referenced to IPD is desirable instead of a current.
R5 = open (size 0603)
R2
Current Limiting. An external resistor to VPOS sets the current limit at INPT from
1 mA to 16 mA. I
LIM
= 48 V/(R
LIM
+ 3 kΩ). The evaluation board is configured such that
I
LIM
= 3.7 mA.
R2 = 10 kΩ (size 0402)
C1, C2, R3 Supply Filtering/Decoupling. C1 = 0.01 μF (size 0402)
C2 = 0.1 μF (size 0603)
R3 = 0 Ω (size 0805)
05694-014
Figure 36. Component Side Layout
05694-015
Figure 37. Component Side Silkscreen
ADL5315
Rev. 0 | Page 17 of 20
OUTLINE DIMENSIONS
0.30
0.23
0.18
SEATING
PLANE
0.20 REF
0.80 MAX
0.65 TYP
1.00
0.85
0.80
1.89
1.74
1.59
0.50 BSC
0.60
0.45
0.30
0.55
0.40
0.30
0.15
0.10
0.05
0.25
0.20
0.15
BOTTOM VIEW
*
4 1
58
3.25
3.00
2.75
1.95
1.75
1.55
2.95
2.75
2.55
PIN 1
INDICATO
R
2.25
2.00
1.75
TOP VIEW
0.05 MAX
0.02 NOM
12° MAX
EXPOSED PAD
Figure 38. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD]
2 mm × 3 mm Body, Very Thin, Dual Lead
(CP-8-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
ADL5315ACPZ-R7
1
–40°C to +85°C 8-Lead LFCSP_VD CP-8-1 Q0
ADL5315ACPZ-WP
1, 2
–40°C to +85°C 8-Lead LFCSP_VD CP-8-1 Q0
ADL5315-EVAL Evaluation Board
1
Z = Pb-free part.
2
WP = Waffle pack

ADL5315ACPZ-R7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Current & Power Monitors & Regulators 5V Current Mirror
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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