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3.9.3 DPAA Terms and Definitions
The following table lists common DPAA terms and their definitions.
3.9.4 Major DPAA Components
The Data Path Acceleration Architecture (DPAA) includes the following major components:
Section 3.9.4.1, “Frame Manager (FMan)
Section 3.9.4.2, “Queue Manager (QMan)
Section 3.9.4.3, “Buffer Manager (BMan)
Section 3.9.4.6, “RapidIO Message Manager (RMan)
Table 4. DPAA Terms and Definitions
Term Definition Graphic Representation
Buffer Region of contiguous memory, allocated by software, managed by
the DPAA BMan
Buffer pool Set of buffers with common characteristics (mainly size, alignment,
access control)
Frame Single buffer or list of buffers that hold data, for example, packet
payload, header, and other control information
Frame queue
(FQ)
FIFO of frames
Work queue
(WQ)
FIFO of FQs
Channel Set of eight WQs with hardware provided prioritized access
Dedicated
channel
Channel statically assigned to a particular end point, from which
that end point can dequeue frames. End point may be a CPU,
FMan, PME, or SEC.
Pool
channel
A channel statically assigned to a group of end points, from which
any of the end points may dequeue frames.
B
B B B
FQ F F=
WQ FQ FQ=
Chan
FQ FQ0
FQ FQ
=
Priority
7
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Section 3.9.4.4, “Security Engine (SEC 4.2)
Section 3.9.4.5, “Pattern Matching Engine (PME 2.1)
Figure 5. QorIQ Data Path Acceleration Architecture (DPAA)
3.9.4.1 Frame Manager (FMan)
The Frame Manager (FMan) combines the Ethernet network interfaces with packet distribution logic to
provide intelligent distribution and queuing decisions for incoming traffic. This integration allows the
FMan to perform configurable parsing and classification of the incoming frame with the purpose of
selecting the appropriate input frame queue for expedited processing by a CPU or pool of CPUs.
3.9.4.1.1 FMan Network Interfaces
The FMan integrates five data path, tri-speed Ethernet controllers (dTSECs) and one 10-Gbit Ethernet
controller.
Note that the more basic parsing and filing capability found in prior PowerQUICC eTSECs is removed
from the MACs themselves, and aggregated in the more flexible and robust parsing and classification logic
described in Section 3.9.4.1.2, “FMan Parse Function.”
The Ethernet controllers support the following:
Programmable CRC generation and checking
RMON statistics
Jumbo frames of up to 9.6 Kbytes
They are designed to comply with IEEE Std 802.3®, IEEE 802.3u, IEEE 802.3x, IEEE 802.3z,
IEEE 802.3ac, IEEE 802.3ab, and additionally the 1Gbps MACs support IEEE-1588 v2 (clock
synchronization over Ethernet).
The dTSECS are capable of full- and half-duplex Ethernet support (1000 Mbps supports only full duplex);
the 10-Gbit MAC is a single-speed full duplex. It supports IEEE 802.3 full-duplex flow control (automatic
PAUSE frame generation or software-programmed PAUSE frame generation and recognition).
QMan
BMan
1GE 1GE
1GE 1GE
Parse
SEC 4.2
PME 2.1
and
Classify
Buffer Buffer
Frame Manager
DMA
BMan
RMan
10GE
1GE
P5020 QorIQ Communications Processor Product Brief, Rev. 1
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Freescale Semiconductor18
When all SERDES are otherwise allocated, it is possible to enable two of dTSECs by means of RGMII or
RMII physical interfaces.
3.9.4.1.2 FMan Parse Function
The primary function of the packet parse logic is to identify the incoming frame for the purpose of
determining the desired treatment to apply. This parse function can parse many standard protocols,
including options and tunnels, and supports a generic configurable capability to allow proprietary or future
protocols to be parsed.
There are several types of parser headers, shown in the following table.
The underlying notion is that different frames may require different treatment, and only through detailed
parsing of the frame can proper treatment be determined.
Parse results can (optionally) be passed to software.
3.9.4.1.3 FMan Distribution and Policing
After parsing is complete, there are two options for treatment (see Table 6).
Key benefits of the FMan policing function are as follows:
Table 5. Parser Header Types
Header Type Definition
Self-describing Announced by proprietary values of Ethertype, protocol identifier, next header, and other standard fields.
They are self-describing in that the frame contains information that describes the presence of the
proprietary header.
Non-self-describing Does not contain any information that indicates the presence of the header.
For example, a frame that always contains a proprietary header before the Ethernet header would be
non-self-describing. Both self-describing and non-self-describing headers are supported by means of
parsing rules in the FMan.
Proprietary Can be defined as being self-describing or non-self-describing
Table 6. Post-Parsing Treatment Options
Treatment Function Benefits
Hash Hashes selected fields in the frame as part of a spreading mechanism
The result is a specific frame queue identifier.
To support added control, this FQID can be indexed by values found in the frame,
such as TOS or p-bits, or any other desired field(s).
Useful when spreading
traffic while obeying QoS
constraints is required
Classification
look-up
Looks up certain fields in the frame to determine subsequent action to take,
including policing
The FMan contains internal memory that holds small tables for this purpose.
The user configures the sets of lookups to perform, and the parse results dictate
which one of those sets to use.
Lookups can be chained together such that a successful look-up can provide key
information for a subsequent look-up. After all the look-ups are complete, the final
classification result provides either a hash key to use for spreading, or a FQ ID
directly.
Useful when hash
distribution is insufficient
and a more detailed
examination of the frame
is required
Can determine whether
policing is required and
the policing context to use

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