NCV7381
www.onsemi.com
15
Table 13. RECEPTION PARAMETERS
Symbol Parameter Conditions Min Typ Max Unit
uData0 Receiver threshold for detecting Data_0
Activity detected
previously.
|uBP−uBM| ≤ 3 V
−300 −150 mV
uData1 Receiver threshold for detecting Data_1 150 300 mV
|uData1|−|uData0| Mismatch of receiver thresholds (uBP+uBM)/2 = 2.5 V −30 30 mV
uData0_LP Low power receiver threshold for detecting
Data_0
uV
BAT
≥ 7 V −400 −100 mV
uCM Common mode voltage range (with respect to
GND) that does not disturb the receiver func-
tion and reception level parameters
uBP = (uBP+uBM)/2
(Note 9)
−10 15 V
uBias
Bus bias voltage during bus state Idle in
normal−power modes
R
BUS
= 40−55 W;
C
BUS
= 100 pF
(Note 10)
1800 2500 3200 mV
Bus bias voltage during bus state Idle in
low−power modes
−200 0 200 mV
R
CM1
, R
CM2
Receiver common mode resistance (Note 10) 10 40
kW
C_BP, C_BM Input capacitance on BP and BM pin (Note 11) f = 5 MHz 20 pF
C_Bus
DIF
Bus differential input capacitance (Note 11) f = 5 MHz 5 pF
iBP
LEAK
iBM
LEAK
Absolute leakage current when driver is off uBP = uBM = 5 V
All other pins = 0 V
25
mA
iBP
LEAKGND
iBM
LEAKGND
Absolute leakage current,
in case of loss of GND
uBP = uBM = 0 V
All other pins = 16 V
1600
mA
uBusRx
Data
Test signal parameters for reception
of Data_0 and Data_1 symbols
Test signal and
parameters defined in
Figure 12 and
Figure 13.
RxD pin loaded with
25 pF capacitor.
400 3000 mV
dBusRx0
BD
60 4330 ns
dBusRx1
BD
60 4330 ns
dBusRx10 22.5 ns
dBusRx01 22.5 ns
dBDRx10 Receiver delay, negative edge (Note 12) 75 ns
dBDRx01 Receiver delay, positive edge (Note 12) 75 ns
dBDRxAsym Receiver delay mismatch
| dBDRx10− dBDRx01| (Note 12)
5 ns
uBusRx
Test signal parameters for
bus activity detection
400 3000 mV
dBusActive 590 610 ns
dBusIdle 590 610 ns
dBusRxia 18 22 ns
dBusRxai 18 22 ns
dBDIdleDetection Bus driver filter−time for idle detection 50 200 ns
dBDActivityDetection Bus driver filter−time for activity detection 100 250 ns
dBDRxai Bus driver idle reaction time 50 275 ns
dBDRxia Bus driver activity reaction time 100 325 ns
dBDTxRxai Idle−Loopdelay 325 ns
9. Tested on a receiving bus driver. Sending bus driver has a ground offset voltage in the range of [−12.5 V to +12.5 V] and sends a 50/50 pattern.
10.Bus driver is connected to GND and uV
CC
= 5 V and uV
BAT
≥ 7 V.
11. Values based on design and characterization, not tested in production.
12.Guaranteed for ±300 mV and ±150 mV level of uBus.
