SiC530
www.vishay.com
Vishay Siliconix
S15-2523-Rev. B, 02-Nov-15
5
Document Number: 62940
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DETAILED OPERATIONAL DESCRIPTION
PWM Input with Tri-state Function
The PWM input receives the PWM control signal from the VR
controller IC. The PWM input is designed to be compatible
with standard controllers using two state logic (H and L) and
advanced controllers that incorporate tri-state logic (H, L
and tri-state) on the PWM output. For two state logic, the
PWM input operates as follows. When PWM is driven above
V
PWM_TH_R
the low-side is turned OFF and the high-side is
turned ON. When PWM input is driven below V
PWM_TH_F
the
high-side is turned OFF and the low-side is turned ON. For
tri-state logic, the PWM input operates as previously stated
for driving the MOSFETs when PWM is logic high and logic
low. However, there is a third state that is entered as the
PWM output of tri-state compatible controller enters its high
impedance state during shut-down. The high impedance
state of the controller’s PWM output allows the SiC530 to
pull the PWM input into the tri-state region (see definition of
PWM logic and tri-state, fig. 5). If the PWM input stays in this
region for the tri-state hold-off period, t
TSHO
, both high-side
and low-side MOSFETs are turned OFF. The function allows
the VR phase to be disabled without negative output voltage
swing caused by inductor ringing and saves a Schottky
diode clamp. The PWM and tri-state regions are separated
by hysteresis to prevent false triggering. The SiC530
incorporates PWM voltage thresholds that are compatible
with 5 V logic.
Diode Emulation Mode and PS4 Mode (ZCD_EN#)
The ZCD_EN# pin enables or disables diode emulation
mode. When ZCD_EN# is driven below V
TH_ZCD_EN#_F
, diode
emulation is allowed. When ZCD_EN# is driven above
V
TH_ZCD_EN#_R
, continuous conduction mode is forced.
Diode emulation mode allows for higher converter efficiency
under light load situations. With diode emulation active, the
SiC530 will detect the zero current crossing of the output
inductor and turn off the low-side MOSFET. This ensures
that discontinuous conduction mode (DCM) is achieved.
Diode emulation is asynchronous to the PWM signal,
therefore, the SiC530 will respond to the ZCD_EN# input
immediately after it changes state.
The ZCD_EN# pin can be floated resulting in a high
impedance state. High impedance on the input of ZCD_EN#
combined with a tri-stated PWM output will shut down the
SiC530, reducing current consumption to typically 5 μA.
This is an important feature in achieving the low standby
current requirements required in the PS4 state in ultrabooks
and notebooks.
Voltage Input (V
IN
)
This is the power input to the drain of the high-side power
MOSFET. This pin is connected to the high power
intermediate BUS rail.
Switch Node (V
SWH
and PHASE)
The switch node, V
SWH
, is the circuit power stage output.
This is the output applied to the power inductor and output
filter to deliver the output for the buck converter. The PHASE
pin is internally connected to the switch node, V
SWH
. This pin
is to be used exclusively as the return pin for the BOOT
capacitor.
Ground Connections (C
GND
and P
GND
)
P
GND
(power ground) should be externally connected to
C
GND
(control signal ground). The layout of the printed circuit
board should be such that the inductance separating C
GND
and P
GND
is minimized. Transient differences due to
inductance effects between these two pins should not
exceed 0.5 V.
Control and Drive Supply Voltage Input (V
DRV
, V
CIN
)
V
CIN
is the bias supply for the gate drive control IC. V
DRV
is
the bias supply for the gate drivers. It is recommended to
separate these pins through a resistor. This creates a low
pass filtering effect to avoid coupling of high frequency gate
drive noise into the IC.
Bootstrap Circuit (BOOT)
The internal bootstrap diode and an external bootstrap
capacitor form a charge pump that supplies voltage to the
BOOT pin. An integrated bootstrap diode is incorporated so
that only an external capacitor is necessary to complete the
bootstrap circuit. Connect a boot strap capacitor with one
leg tied to BOOT pin and the other tied to PHASE pin.
Shoot-Through Protection and Adaptive Dead Time
The SiC530 has an internal adaptive logic to avoid shoot
through and optimize dead time. The shoot through
protection ensures that both high-side and low-side
MOSFETs are not turned ON at the same time. The adaptive
dead time control operates as follows. The high-side and
low-side gate voltages are monitored to prevent the
MOSFET turning ON from tuning ON until the other
MOSFET’s gate voltage is sufficiently low (< 1 V). Built in
delays also ensure that one power MOSFET is completely
OFF, before the other can be turned ON. This feature helps
to adjust dead time as gate transitions change with respect
to output current and temperature.
Under Voltage Lockout (UVLO)
During the start up cycle, the UVLO disables the gate
drive, holding high-side and low-side MOSFET gates low,
until the supply voltage rail has reached a point at which
the logic circuitry can be safely activated. The SiC530 also
incorporates logic to clamp the gate drive signals to zero
when the UVLO falling edge triggers the shutdown of the
device.
