PSMN130-200D All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 20 December 2010 3 of 12
NXP Semiconductors
PSMN130-200D
N-channel TrenchMOS SiliconMAX standard level FET
4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
drain-source voltage T
j
≥ 25 °C; T
j
≤ 175 °C - 200 V
V
DGR
drain-gate voltage T
j
≥ 25 °C; T
j
≤ 175 °C; R
GS
=20kΩ - 200 V
V
GS
gate-source voltage -20 20 V
I
D
drain current V
GS
=10V; T
mb
=100°C - 14 A
V
GS
=10V; T
mb
=25°C - 20 A
I
DM
peak drain current pulsed; T
mb
=25°C - 80 A
P
tot
total power dissipation T
mb
= 25 °C - 150 W
T
stg
storage temperature -55 175 °C
T
j
junction temperature -55 175 °C
Source-drain diode
I
S
source current T
mb
=25°C - 20 A
I
SM
peak source current pulsed; T
mb
=25°C - 80 A
Avalanche ruggedness
E
DS(AL)S
non-repetitive drain-source
avalanche energy
V
GS
=10V; T
j(init)
=25°C; I
D
=19A;
V
sup
≤ 25 V; unclamped; t
p
= 100 µs;
R
GS
=50Ω
- 252 mJ
I
AS
non-repetitive avalanche
current
V
sup
≤ 25 V; V
GS
=10V; T
j(init)
=25°C;
R
GS
=50Ω; unclamped
-20A
Fig 1. Normalized total power dissipation as a
function of mounting base temperature
Fig 2. Normalized continuous drain current as a
function of mounting base temperature
014aab264
T
mb
(°C)
0 50 100 150 1751257525
40
60
20
80
100
P
der
(%)
0
014aab265
T
mb
(°C)
0 50 100 150 1751257525
40
60
20
80
100
I
D
(%)
0
