Z87200
Spread-Spectrum Transceiver Zilog
4-32
CONTROL REGISTERS (Continued)
tion Processor will insert a detect pulse at the appropriate
time if a successful correlation is not detected as expected
a priori
.
Address 2D
H
:
Bits 5-0 — Rx Chips per Data Symbol
The number of PN chips per data symbol in the receiver is
controlled by address 2D
H
. The unsigned value must
range from 1 to 63 (01
H
to 3F
H
), where the number of chips
per data symbol will be this value plus 1. The
a priori
num-
ber of PN chips per data symbol, where this value must be
equal to the number of non-zero coefficients stored in the
Data Symbol Coefficient Registers (addresses 17
H
to 26
H
)
for the PN Matched Filter, is used to help control symbol
timing in the receiver. Since acquisition is purely based on
correlation of a single received Acquisition/Preamble sym-
bol, the corresponding number of chips per Acquisi-
tion/Preamble symbol is not required and no similar regis-
ter is provided for such use.
Address 2E
H
:
Receiver Data Symbols per Burst (bits 7-0)
The data stored as two bytes in addresses 2E
H
(LS Byte)
and 3A
H
(MS Byte) define the number of data symbols per
burst. This unsigned value must range from 3 to 65,535
(0003
H
to FFFF
H
), and the number of data symbols per
burst will be this value minus 2, giving a range of 1 to
65,533. Note that the range is slightly different from that
supported by the Z87200’s transmitter. Once the number
of received data symbols processed exceeds this number,
the burst is assumed to have ended and the receiver im-
mediately returns to acquisition mode, ready for the next
burst.
Address 2F
H
:
Missed Detects per Burst Threshold
To monitor the reception quality of the received burst data
symbols, the Z87200 incorporates a feature within its
tracking algorithm that tallies the number of received data
symbols whose PN Matched Filter correlation output did
not exceed the Data Symbol Threshold value.
Whenever a “missed detect” occurs, the tracking algorithm
will generate and insert a detect signal at the sample clock
cycle corresponding to the expected correlation peak in or-
der to maintain a continuous train of data symbols and
symbol clocks. Simultaneously, a “missed detect” pulse
will be generated internally and tallied for the current burst.
When the accumulated number of missed detects is great-
er than the value stored in address 2F
H
, the device will ter-
minate reception of the current burst and return to acquisi-
tion mode to await the next burst.
The unsigned value in address 2F
H
must range from 1 to
255 (01
H
to FF
H
), where this value is the maximum num-
ber of missed detects per burst allowed before the burst
terminates. This function can be disabled by setting bit 5 of
address 30
H
high.
Address 30
H
:
Bit 0 — Manual Detect Enable
While the receiver is in acquisition mode, valid bursts may
be ignored by setting this bit high. When it is set low (nor-
mal operation), the detection of a burst’s Acquisition/Pre-
amble symbol is enabled. Setting this bit high allows the
user to force the device to ignore Acquisition/Preamble
symbols that would normally be successfully acquired.
This feature could be used, for example, in a system em-
ploying multiple receivers with identical PN codes in a
Time Division Multiple Access scheme where time-syn-
chronized device management could be supported
through dynamic setting of this bit.
Acquisition and Tracking Processor
Registers
Bit 1 — Manual Punctual
This bit enables the user to completely disable the internal
tracking circuitry and force symbol information to be trans-
ferred to the demodulator punctually at the symbol rate de-
termined by the number of chips per data symbol informa-
tion programmed into address 2D
H
. This function
overrides the symbol tracking algorithm, although the ab-
sence of a successful correlation will continue to be tallied
as a missed detect and compared against the value stored
in address 2F
H
to monitor signal quality unless disabled by
bit 5 of address 30
H
. When bit 1 is set low, the Z87200 will
operate in its normal mode with symbol timing derived from
the symbol tracking processor; when set high, symbol tim-
ing is derived from the
a priori
number of chips per data
symbol stored in bits 5-0 of address 2D
H
.
Bit 2 — Force Continuous Acquisition
This bit enables the user to force the receiver to remain in
acquisition mode even after successful detection of the
Acquisition/Preamble symbol. When so commanded, the
receiver will continuously process only Acquisition/Pream-
ble symbols and will not switch from acquisition mode. This
function may be used under manual control to receive a
series of repeated Acquisition/Preamble symbols in order
to increase the confidence level of burst detection before
beginning demodulation of the data symbol information.
When this bit is set high, the device will be locked in acqui-
sition mode and the Symbol Tracking Processor will not in-
Table 13. Data Symbol Threshold Storage
ADDR 2C
H
ADDR 2B
H
Bits 1-0 Bits 7-0
Data Thresh. Bits 9-8 Data Thresh. Bid 7-0
PS010202-0601
Z87200
Zilog Spread-Spectrum Transceiver
4-33
4
sert missed detect pulses; when set low, normal operation
will be enabled whereby data symbols are automatically
processed immediately following detection of an Acquisi-
tion/Preamble symbol.
Bit 3 — Bypass Max. Power Selector
The Z87200’s receiver acquisition and tracking circuitry in-
cludes a function that continuously selects the highest es-
timated power level out of the three most recent consecu-
tive estimated power levels from the PN Matched Filter. As
the contents of the sliding 3-sample window change each
cycle of the baseband sampling clock, a new determina-
tion of the highest power level is made from the current set
of the three most recent power level values. The correlated
I and Q channel values within the 3-sample window corre-
sponding in time to the highest observed power level are
then available to be processed in the demodulator.
This function assures that, within any 3-sample period, the
I and Q channel values corresponding to the highest esti-
mated power level will be selected over the two other pairs
of correlated values even if the estimated power levels of
the other pairs exceed the programmed threshold. The
Maximum Power Selector is used in normal operation of
the Z87200 so that the tracking algorithm discriminates by
estimated power levels rather than exact timing intervals,
thereby allowing the receiver to adjust to dynamic changes
of the symbol phase. In cases where specific correlation
values are desired regardless of their associated power
level, bit 3 of address 30
H
enables the 3-sample power dis-
criminator to be bypassed, thereby making the outputs of
the PN Matched Filter available directly to the demodula-
tor.
When this bit is set high, the Maximum Power Selector is
bypassed; when it is set low, the Selector is enabled,
where this is the normal operating mode.
Bit 4 — Half Symbol Pulse Off
The Z87200 generates two bit clock pulses per symbol
when operating in QPSK mode, one at the mid-point of
each symbol and one at the end of each symbol. These
clocks are used by the Output Processor to manage data
flow.
When this bit is set high, the mid-point pulse is sup-
pressed; when it is set low, the device operates in its nor-
mal mode. This function is primarily used for test purposes
and should not normally be used.
Bit 5 — Missed Detects Per Burst Off
To monitor the quality of the received burst data symbols,
the Symbol Tracking Processor keeps track of the cumu-
lative number of received data symbols per burst whose
estimated correlation power level did not exceed the spec-
ified Data Symbol Threshold value. When the accumulat-
ed number of missed detects equals the Missed Detects
per Burst Threshold value stored in address 2F
H
, the de-
vice will terminate the reception of the current burst with
the next missed detect and return to acquisition mode to
await the next burst.
When bit 5 is set low, the “missed detect” function operates
normally; when set high, this function is disabled, allowing
the device to be operated until the end of the specified data
burst even when the number of “missed detects” exceeds
the Missed Detects per Burst Threshold.
Bit 6 — Receiver Symbols Per Burst Off
The data stored in addresses 2E
H
and 3A
H
defines the
number of data symbols per burst that will be processed by
the receiver. This unsigned value must range from 3 to
65,535 (0003
H
to FFFF
H
), and the number of data symbols
per burst will be this value minus 2. Once the number of
data symbols processed by the receiver exceeds this num-
ber, the burst is assumed to have ended and the receiver
will immediately return to acquisition mode.
When bit 6 is set high, the function is disabled, providing
an option to track data symbols under external control for
bursts of more than 65,533 data symbols or indefinitely for
continuous transmission; when set low, the function will
operate normally as defined by the value stored in ad-
dresses 2E
H
and 3A
H
.
Address 31
H
:
Bit 0 — Manual Detect Pulse
This bit provides the user a means to externally generate
symbol timing, bypassing and overriding the internal sym-
bol power estimation and tracking circuitry. This function
may be useful in applications where the dynamic charac-
teristics of the transmission environment require unusual
adjustments to the symbol timing.
When bit 0 of address 30
H
is set high (Manual Detect En-
able) and when RXMDET is low, a rising edge on this bit
will generate a detect pulse. The function can also be per-
formed by means of the RXMDET input signal. Bit 0 of ad-
dress 31
H
and the RXMDET input are logically ORed to-
gether so that, when either one is held low, a rising edge
on the other triggers the manual detect function. The rising
edge of this bit is synchronized internally so that on the
second rising edge of the baseband sampling clock that
follows, the rising edge of bit 0 will transfer the I and Q
channel correlated output values of the PN Matched Filter
to the DPSK Demodulator.
Address 32
H
:
Bit 0 — Receiver Manual Abort
This bit enables the user to manually force the Z87200 to
cease reception of the present burst of data symbols and
prepare for acquisition of a new burst. This function can be
used to reset the receiver and prepare to receive a priority
transmission signal under precise timing control, giving the
user the ability to control the current state of the receiver
as needed.
PS010202-0601
Z87200
Spread-Spectrum Transceiver Zilog
4-34
CONTROL REGISTERS (Continued)
When RXMABRT is set low, a rising edge on bit 0 of ad-
dress 32
H
will execute the abort function. The function can
also be performed by means of the RXMABRT input. The
RXMABRT input and bit 0 of address 32
H
are logically
ORed together so that, when either one is held low, a rising
edge on the other triggers the abort function. The second
rising edge of the internal baseband sampling clock that
follows a rising edge of this bit will execute the abort and
also clear the symbols-per-burst, samples-per-symbol,
and missed-detects-per-burst counters. The counters will
be reactivated on the detection of the next Acquisition/Pre-
amble symbol or by a manual detect signal.
Demodulator Registers
Address 33
H
:
Bits 1-0 — Signal Rotation Control
These bits control the function of the Signal Rotation Block
used in demodulation of the differentially encoded BPSK,
QPSK, or π/4 QPSK signals. The previous symbol will be
rotated in phase with respect to the current symbol as
shown in Table 14, where I
OUT
and Q
OUT
are the I and Q
channel outputs of the Signal Rotation Block and I
IN
and
Q
IN
are the inputs. The normal settings are 0 X (no rota-
tion) for BPSK and π/4 QPSK signals and 1 1 (–45° rota-
tion) for conventional QPSK signals.
Bit 2 — Not Used
Bit 2 of address 33
H
is not used and must always be set
low (0).
Bit 3 — Loop Clear Disable
The setting of this bit determines whether the Loop Filter’s
K2 accumulator is reset or not when the Z87200 receiver
function is turned off when the input signal MRXEN is set
low.
When bit 3 is set low, the Loop Filter’s K2 accumulator will
be reset to zero whenever MRXEN is set low to disable the
receiver function. When bit 3 is set high, this function is dis-
abled and the contents of the accumulator are not affected
when MRXEN transitions from high to low. The optimum
setting of this bit will depend on the stability of the oscilla-
tors used for carrier generation and frequency translation
in the system and the length of the period between bursts.
If the oscillators are stable and the period between bursts
is not very long, the optimum setting of this bit will be low
so that at the start of each burst the tracking loop will re-
sume from its state at the end of the previous burst. If the
oscillators are not stable or if the period between bursts is
long with respect to the oscillators’ stability, then the opti-
mum setting may be high so that the tracking loop will re-
start from its initial state at the start of each burst.
Bits 7-4 — AFC Viewport Control
The Z87200 incorporates viewport (data selector) circuitry
to select any eight consecutive bits from the 17-bit output
of the Frequency Discriminator as the 8-bit input to the
Loop Filter block to implement the Z87200’s AFC function.
The unsigned value, n, of bits 7-4 of address 33
H
deter-
mines the 8-bit input to the Loop Filter as the 17-bit Fre-
quency Discriminator output divided by 2
n
. Equivalently,
bits 7-4 control the viewport of the Frequency Discrimina-
tor output as shown in Table 14.
Table 14. Signal Rotation Control
Bits 1,0
I
OUT
Q
OUT
Resulting
Rotation
0, X I
IN
Q
IN
No rotation
1,0 I
IN
-Q
IN
Q
IN
+I
IN
+45° rotation
1,1 I
IN
+ Q
IN
Q
IN
-I
IN
-45° rotation
Table 15. AFC Viewport Control
Bits 7-4 Discrim. bits output to Loop Filter
0
H
7-0
1
H
8-1
2
H
9-2
3
H
10-3
• • • • • •
• • • • • •
8
H
15-8
9
H
16-9
A
H
-F
H
Not used
PS010202-0601

Z8720045FSC

Mfr. #:
Manufacturer:
ZiLOG
Description:
RF Transceiver SS MODEM
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New from this manufacturer.
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