2
ICS9LPRS464
System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUss
IDT
TM
/ICS
TM
System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUs
1377A—04/07/08
Pin Description
PIN # PIN NAME TYPE DESCRIPTION
1 GNDREF GND Ground pin for the REF outputs.
2 VDDREF PWR Ref, XTAL power supply, nominal 3.3V
3 X1 IN Crystal input, nominally 14.318MHz
4 X2 OUT Crystal output, nominally 14.318MHz
5 VDD48 PWR Power pin for the 48MHz outputs and core. 3.3V
6 48MHz_0 OUT 48MHz clock output.
7 48MHz_1 OUT 48MHz clock output.
8 GND48 GND Ground pin for the 48MHz outputs
9 SMBCLK IN Clock pin of SMBus circuitry, 5V tolerant.
10 SMBDAT I/O Data pin for SMBus circuitry, 5V tolerant.
11 RESET_IN# IN
Real Time falling edge triggered input, When asserted, the part initiates a power
up reset with the SMBus being reset to it's power up values, and all PLL derived
clocks stopped for the duration of Power up Stabilization. REF outputs continue
to run.
12 SRC5T_LPR OUT
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
13 SRC5C_LPR OUT
Complement clock of low power differential SRC clock pair with integrated 33
ohm series resistor. (no 50ohm shunt resistor to GND needed)
14 VDDSRC PWR Supply for SRC, 3.3V nominal
15 GNDSRC GND Ground pin for the SRC outputs
16 SRC4T_LPR OUT
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
17 SRC4C_LPR OUT
Complement clock of low power differential SRC clock pair with integrated 33
ohm series resistor. (no 50ohm shunt resistor to GND needed)
18 SRC3T_LPR OUT
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
19 SRC3C_LPR OUT
Complement clock of low power differential SRC clock pair with integrated 33
ohm series resistor. (no 50ohm shunt resistor to GND needed)
20 SRC2T_LPR OUT
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
21 SRC2C_LPR OUT
Complement clock of low power differential SRC clock pair with integrated 33
ohm series resistor. (no 50ohm shunt resistor to GND needed)
22 GNDSRC GND Ground pin for the SRC outputs
23 VDDSRC PWR Supply for SRC, 3.3V nominal
24 SRC1T_LPR OUT
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
25 SRC1C_LPR OUT
Complement clock of low power differential SRC clock pair with integrated 33
ohm series resistor. (no 50ohm shunt resistor to GND needed)
26 VDDSRC PWR Supply for SRC, 3.3V nominal
27 GNDSRC GND Ground pin for the SRC outputs
28 *CLKREQB# IN
Programmable Clock Request pin for SRC/ATIG/SB_SRC outputs. If output is
selected for control, then that output is controlled as follows:
0 = Enabled, 1 = Tri-state
