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ICS9LPRS464AGLF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23
10
ICS9LPRS464
System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUss
IDT
TM
/ICS
TM
System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUs
1377A—04/07/08
Table2: SRC Frequency Selection Table
Bit3 Bit2 Bit1 Bit0
SRC
SS_EN
SRC
FS3
SRC
FS2
SRC
FS1
SRC
FS0
0 0 0 0 0 100.00
0
0%
0 0 0 0 1 101.00
0
1%
0 0 0 1 0 102.00
0
2%
0 0 0 1 1 103.00
0
3%
0 0 1 0 0 104.00
0
4%
0 0 1 0 1 105.00
0
5%
0 0 1 1 0 106.00
0
6%
0 0 1 1 1 107.00
0
7%
0 1 0 0 0 100.00
0
0%
0 1 0 0 1 101.00
0
1%
0 1 0 1 0 102.00
0
2%
0 1 0 1 1 103.00
0
3%
0 1 1 0 0 104.00
0
4%
0 1 1 0 1 105.00
0
5%
0 1 1 1 0 106.00
0
6%
0 1 1 1 1 107.00
0
7%
1 0 0 0 0 100.00
-0.25%
0%
1 0 0 0 1 101.00
-0.25%
1%
1 0 0 1 0 102.00
-0.25%
2%
1 0 0 1 1 103.00
-0.25%
3%
1 0 1 0 0 104.00
-0.25%
4%
1 0 1 0 1 105.00
-0.25%
5%
1 0 1 1 0 106.00
-0.25%
6%
1 0 1 1 1 107.00
-0.25%
7%
1 1 0 0 0 100.00
-0.5%
0%
1 1 0 0 1 101.00
-0.5%
1%
1 1 0 1 0 102.00
-0.5%
2%
1 1 0 1 1 103.00
-0.5%
3%
1 1 1 0 0 104.00
-0.5%
4%
1 1 1 0 1 105.00
-0.5%
5%
1 1 1 1 0 106.00
-0.5%
6%
1 1 1 1 1 107.00
-0.5%
7%
Byte 0
Bit 5 Spread
%
SRC
OverClock
%
SRC(7:0)
(MHz)
B
y
te 5
11
ICS9LPRS464
System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUss
IDT
TM
/ICS
TM
System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUs
1377A—04/07/08
Table3: ATIG Frequency Selection Table
Bit4 Bit3 Bit1 Bit0
ATIG
SS_EN
ATIG
FS3
ATIG
FS2
ATIG
FS1
ATIG
FS0
0 0 0 0 0 100.00
0
0%
0 0 0 0 1 105.00
0
5%
0 0 0 1 0 110.00
0
10%
0 0 0 1 1 115.00
0
15%
0 0 1 0 0 120.00
0
20%
0 0 1 0 1 125.00
0
25%
0 0 1 1 0 130.00
0
30%
0 0 1 1 1 135.00
0
35%
0 1 0 0 0 100.00
0
0%
0 1 0 0 1 105.00
0
5%
0 1 0 1 0 110.00
0
10%
0 1 0 1 1 115.00
0
15%
0 1 1 0 0 120.00
0
20%
0 1 1 0 1 125.00
0
25%
0 1 1 1 0 130.00
0
30%
0 1 1 1 1 135.00
0
35%
1 0 0 0 0 100.00
-0.25%
0%
1 0 0 0 1 105.00
-0.25%
5%
1 0 0 1 0 110.00
-0.25%
10%
1 0 0 1 1 115.00
-0.25%
15%
1 0 1 0 0 120.00
-0.25%
20%
1 0 1 0 1 125.00
-0.25%
25%
1 0 1 1 0 130.00
-0.25%
30%
1 0 1 1 1 135.00
-0.25%
35%
1 1 0 0 0 100.00
-0.5%
0%
1 1 0 0 1 105.00
-0.5%
5%
1 1 0 1 0 110.00
-0.5%
10%
1 1 0 1 1 115.00
-0.5%
15%
1 1 1 0 0 120.00
-0.5%
20%
1 1 1 0 1 125.00
-0.5%
25%
1 1 1 1 0 130.00
-0.5%
30%
1 1 1 1 1 135.00
-0.5%
35%
Byte 0
Bit 6
ATIG(2:0)
(MHz)
Spread
%
ATIG
OverClock
%
Byte 9
12
ICS9LPRS464
System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUss
IDT
TM
/ICS
TM
System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUs
1377A—04/07/08
Table 4: CPU Divider Ratios
B19b(7:4)
Bit
00 01 10 11
MSB
00 0000 2 0100 4 1000 8 1100 16
01 0001 3 0101 6 1001 12 1101 24
10 0010 5 0110 10 1010 20 1110 40
11 0011 15 0111 30 1011 60 1111 120
LSB
Address Div Address Address Div Address Div
Table 5: HTT Divider Ratios
B20b(3:0)
Bit
00 01 10 11
MSB
00 0000 4 0100 8 1000 16 1100 32
01 0001 3 0101 6 1001 12 1101 24
10 0010 5 0110 10 1010 20 1110 40
11 0011 15 0111 30 1011 60 1111 120
LSB
Address Div Address Address Div Address Div
Table 6: ATIG Divider Ratios
B19b(3:0)
Bit
00 01 10 11
MSB
00 0000 2 0100 4 1000 8 1100 16
01 0001 3 0101 6 1001 12 1101 24
10 0010 5 0110 10 1010 20 1110 40
11 0011 7 0111 14 1011 28 1111 56
LSB
Address Div Address Address Div Address Div
Divider (1:0)
Divider (3:2)
Divider (3:2)
Divider (1:0)
Divider (3:2)
Divider (1:0)
CPU Clock
Common Recommendations for Differential Routing Dimension or Value Unit Figure
0.5 max inch 1
L1 length, Route as coupled 93 ohm trace.
L2 length, Route as coupled 93 ohm trace.
Contact AMD
inch 1
L2
L2
L1
L1
3900pF
+/-10%
Figure 1 CPU clock routing.
Low Power Output Buffer
w/integrated series resistor
AMD "Greyhound"
CPU input
3900pF
+/-10%
93
Ω
+/-10% DIFF
93
Ω
+/-10% DIFF
169
Ω
+/-10%
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ICS9LPRS464AGLF

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IC CLOCK LP ATI RS/RD600 56TSSOP
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