Description
The AFBR-5100Z family of trans ceivers from Avago Tech-
nologies provide the system designer with products to
implement a range of FDDI and ATM (Asynchronous
Transfer Mode) designs at the 100 Mbps/125 MBd rate.
The transceivers are all supplied in the new industry stan-
dard 1x9 SIP package style with either a duplex SC or a
duplex ST* connector interface.
FDDI PMD, ATM and Fast Ethernet 2000 m Backbone
Links
The AFBR-5103Z/-5103TZare 1300 nm products with
optical performance compliant with the FDDI PMD
standard. The FDDI PMD standard is ISO/IEC 9314-3:
1990 and ANSI X3.166 - 1990.
These transceivers for 2000 meter multimode  ber
backbones are supplied in the small 1x9 duplex SC or
ST package style for those designers who want to avoid
the larger MIC/R (Media Interface Connector/Receptacle)
de ned in the FDDI PMD standard.
Avago Technologies also provides several other FDDI
products compliant with the PMD and SM-PMD stan-
dards. These products are available with MIC/R, ST
©
and
FC connector styles. They are available in the 1x13 and
2x11 transceiver and 16 pin transmitter/receiver package
styles for those designs that require these alternate con-
gurations.
The AFBR-5103Z/-5103TZ is also useful for both ATM 100
Mbps interfaces and Fast Ethernet 100 Base-FX inter-
faces. The ATM Forum User-Network Interface (UNI) Stan-
dard, Version 3.0, de nes the Physical Layer for 100 Mbps
Multimode Fiber Interface for ATM in Section 2.3 to be
the FDDI PMD Standard. Likewise, the Fast Ethernet Al-
liance de nes the Physical Layer for 100 Base-FX for Fast
Ethernet to be the FDDI PMD Standard.
*ST is a registered trademark of AT&T Lightguide Cable Connectors.
Features
Full Compliance with the Optical Performance Require-
ments of the FDDI PMD Standard
Full Compliance with the FDDI LCF-PMD Standard
Full Compliance with the Optical Performance Require-
ments of the ATM 100 Mbps Physical Layer
Full Compliance with the Optical Performance Require-
ments of 100 Base-FX Version of IEEE 802.3u
Multisourced 1x9 Package Style with Choice of Duplex
SC or Duplex ST* Receptacle
Wave Solder and Aqueous Wash Process Compatible
RoHS Compliance
Applications
Multimode Fiber Backbone Links
Multimode Fiber Wiring Closet to Desktop Links
Multimode Fiber Media Converter
Note: The “T” in the product numbers indicates a transceiver with a
duplex ST connector receptacle. Product numbers without a “T” indicate
transceivers with a duplex SC connector receptacle.
AFBR-5103Z, AFBR-5103TZ, AFBR-5103AZ, AFBR-5103ATZ,
AFBR-5103PZ and AFBR-5103PEZ
FDDI, 100 Mbps ATM, and Fast Ethernet Transceivers
in Low Cost 1x9 Package Style
Data Sheet
2
ATM applications for physical layers other than 100 Mbps
Multimode Fiber Interface are supported by Avago Tech-
nologies. Products are available for both the single mode
and the multimode  ber SONET-OC-3C (STS-3C) ATM in-
terface and the 155 Mbps ATM 94 MBd multimode  ber
ATM interface as speci ed in the ATM Forum UNI.
Transmitter Sections
The transmitter sections of the AFBR-5103Z series utilize
1300 nm Surface Emitting InGaAsP LEDs. These LEDs
are packaged in the optical subassembly portion of the
transmitter section. They are driven by a custom silicon
IC which converts di erential PECL logic signals, ECL ref-
erenced (shifted) to a +5 Volt supply, into an analog LED
drive current.
Receiver Sections
The receiver sections of the AFBR-5103Z series utilize
InGaAs PIN photo diodes coupled to a custom silicon
transimpedance preampli er IC. These are packaged in
the optical sub assembly portion of the receiver.
These PIN/preampli er com bi nations are coupled to
a custom quantizer IC which provides the  nal pulse
shaping for the logic output and the Signal Detect func-
tion. The data output is di erential. The signal detect
output is single-ended. Both data and signal detect
outputs are PECL compat ible, ECL referenced (shifted) to
a +5 Volt power supply.
Package
The overall package concept for the Avago Technologies
transceivers consists of the following basic elements; two
optical subassemblies, an electrical subassembly and the
housing as illustrated in Figure 1 and Figure 1a.
Figure 2b shows the outline drawing for options that
include mezzanine height with extended shield.
The package outline drawing and pin out are shown in
Figures 2, 2a and 3. The details of this package outline
and pin out are compliant with the multi source de ni-
tion of the 1x9 SIP. The low pro le of the Avago Tech-
nologies transceiver design complies with the maximum
height allowed for the duplex SC connector over the
entire length of the package.
The optical subassemblies utilize a high volume assem-
bly process together with low cost lens elements which
result in a cost e ective building block.
The electrical subassembly con sists of a high volume
multilayer printed circuit board on which the IC chips
and various surface-mounted passive circuit elements
are attached.
The package includes internal shields for the electrical
and optical subassemblies to ensure low EMI emissions
and high immunity to external EMI  elds.
The outer housing including the duplex SC connec-
tor receptacle or the duplex ST ports is molded of  lled
non-conductive plastic to provide mechanical strength
and electrical isolation. The solder posts of the Avago
Technologies design are isolated from the circuit design
of the transceiver and do not require connection to a
ground plane on the circuit board.
The transceiver is attached to a printed circuit board with
the nine signal pins and the two solder posts which exit
the bottom of the housing. The two solder posts provide
the primary mechanical strength to withstand the loads
imposed on the trans ceiver by mating with duplex or
simplex SC or ST connectored  ber cables.
DATA OUT
SIGNAL
DETECT OUT
DATA IN
ELECTRICAL SUBASSEMBLY
QUANTIZER IC
DRIVER IC
TOP VIEW
PIN PHOTODIODE
DUPLEX SC
RECEPTACLE
OPTICAL
SUBASSEMBLIES
LED
PREAMP IC
DIFFERENTIAL
SINGLE-ENDED
DIFFERENTIAL
Figure 1. SC Block Diagram
3
Figure 1a. ST Block Diagram.
Figure 2. Package Outline Drawing with Standard Height.
39.12
(1.540)
MAX.
AREA
RESERVED
FOR
PROCESS
PLUG
12.70
(0.500)
25.40
(1.000)
MAX.
12.70
(0.500)
10.35
(0.407)
MAX.
+ 0.25
- 0.05
+ 0.010
- 0.002
3.30 ± 0.38
(0.130 ± 0.015)
AFBR-5XXXZ
DATE CODE (YYWW)
SINGAPORE
2.92
(0.115)
18.52
(0.729)
4.14
(0.163)
20.32
(0.800)
[8x(2.54/.100)]
23.55
(0.927)
16.70
(0.657)
17.32
(0.682)
20.32
(0.800)
23.32
(0.918)
0.46
(0.018)
NOTE 1
(9x)
NOTE 1
0.87
(0.034)
23.24
(0.915)
15.88
(0.625)
1.27
(0.050
+ 0.08
- 0.05
+ 0.003
- 0.002
0.75
(0.030
)
)
A
6.35
(0.250)
5.93 ± 0.1
(0.233 ± 0.004)
DATA OUT
SIGNAL
DETECT OUT
DATA IN
ELECTRICAL SUBASSEMBLY
QUANTIZER IC
DRIVER IC
TOP VIEW
PIN PHOTODIODE
DUPLEX ST
RECEPTACLE
OPTICAL
SUBASSEMBLIES
LED
PREAMP IC
DIFFERENTIAL
SINGLE-ENDED
DIFFERENTIAL

AFBR-5103TZ

Mfr. #:
Manufacturer:
Broadcom / Avago
Description:
TXRX OPT 1X9 100MBPS DUPL ST SIP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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