74ABT374A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 18 December 2012 3 of 16
NXP Semiconductors
74ABT374A
Octal D-type flip-flop; positive-edge trigger; 3-state
5. Pinning information
5.1 Pinning
5.2 Pin description
6. Functional description
[1] H = HIGH voltage level
h = HIGH voltage level one setup time prior to the LOW-to-HIGH CP transition
L = LOW voltage level
l = LOW voltage level one setup time prior to the LOW-to-HIGH CP transition
Z = high-impedance OFF-state
= LOW-to-HIGH clock transition
Fig 4. Pin configuration for DIP20 and SO20 Fig 5. Pin configuration for SSOP20 and TSSOP20
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Table 2. Pin description
Symbol Pin Description
OE
1 3-state output enable input (active LOW)
D0, D1, D2, D3, D4, D5, D6, D7 3, 4, 7, 8, 13, 14, 17, 18 data input
GND 10 ground (0 V)
CP 11 clock pulse input (active rising edge)
Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7 2, 5, 6, 9, 12, 15, 16, 19 3-state flip-flop output
V
CC
20 supply voltage
Table 3. Function table
[1]
Operating mode Input Internal
flip-flop
Output
OE CP Dn Qn
Load and read register L lL L
L hH H
Load register and disable output H lL Z
H hH Z
