AD8801/AD8803
REV. A
–3–
ORDERING GUIDE
Package Package
Model FTN Temperature Description Option
AD8801AN
RS –40°C to +85°C PDIP-16 N-16
AD8801AR
RS –40°C to +85°C SO-16 R-16A
AD8803AN REFL –40°C to +85°C PDIP-16 N-16
AD8803AR REFL –40°C to +85°C SO-16 R-16A
AD8803 PIN DESCRIPTIONS
Pin Name Description
1V
REFH
Common High-Side DAC Reference Input
2 O1 DAC Output #1, Addr = 000
2
3 O2 DAC Output #2, Addr = 001
2
4 O3 DAC Output #3, Addr = 010
2
5 O4 DAC Output #4, Addr = 011
2
6 SHDN Reference inputs open circuit, active low, all
DAC outputs open circuit. DAC latch settings
maintained.
7
CS Chip Select Input, active low. When CS returns
high, data in the serial input register is decoded
based on the address bits and loaded into the tar-
get DAC register.
8 GND Ground
9V
REFL
Common Low-Side DAC Reference Input
10 CLK Serial Clock Input, Positive Edge Triggered
11 SDI Serial Data Input
12 O5 DAC Output #5, Addr = 100
2
13 O6 DAC Output #6, Addr = 101
2
14 O7 DAC Output #7, Addr = 110
2
15 O8 DAC Output #8, Addr = 111
2
16 V
DD
Positive power supply, specified for operation at
both +3 V and +5 V.
ABSOLUTE MAXIMUM RATINGS
(T
A
= +25°C, unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3, +8 V
V
REFX
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, V
DD
Outputs (Ox) to GND . . . . . . . . . . . . . . . . . . . . . . . . 0 V, V
DD
Digital Input Voltage to GND . . . . . . . . . . . . . . . . . . 0 V, V
DD
Operating Temperature Range . . . . . . . . . . . . .–40°C to +85°C
Maximum Junction Temperature (T
J
MAX) . . . . . . . . +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300°C
Package Power Dissipation . . . . . . . . . . . . .(T
J
MAX – T
A
)/θ
JA
Thermal Resistance θ
JA,
SOIC (SO-16) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
P-DIP (N-16) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57°C/W
AD8801 PIN DESCRIPTIONS
Pin Name Description
1V
REFH
Common DAC Reference Input
2 O1 DAC Output #1, Addr = 000
2
3 O2 DAC Output #2, Addr = 001
2
4 O3 DAC Output #3, Addr = 010
2
5 O4 DAC Output #4, Addr = 011
2
6 SHDN Reference input open circuit, active low, all
DAC outputs open circuit. DAC latch settings
maintained.
7
CS Chip Select Input, active low. When CS returns
high, data in the serial input register is decoded
based on the address bits and loaded into the tar-
get DAC register.
8 GND Ground
9 CLK Serial Clock Input, Positive Edge Triggered
10 SDI Serial Data Input
11 O5 DAC Output #5, Addr = 100
2
12 O6 DAC Output #6, Addr = 101
2
13 O7 DAC Output #7, Addr = 110
2
14 O8 DAC Output #8, Addr = 111
2
15 RS Asynchronous preset to midscale output setting,
active low. Loads all DAC latches with 80
H
.
16 V
DD
Positive power supply, specified for operation at
both +3 V and +5 V.
PIN CONFIGURATIONS
V
REFH
O1
V
DD
RS
O4
SHDN
CS
O6
O5
SDI
O2
O3
O8
O7
GND CLK
1
2
16
15
5
6
7
12
11
10
3
4
14
13
89
TOP VIEW
(Not to Scale)
AD8801
V
REFH
O1
V
DD
O8
O4
SHDN
CS
O5
SDI
CLK
O2
O3
O7
O6
GND V
REFL
1
2
16
15
5
6
7
12
11
10
3
4
14
13
89
TOP VIEW
(Not to Scale)
AD8803
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although these devices feature proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.