AD8801/AD8803
REV. A
–13–
*
* AD8801/AD8803 to M68HC11 Interface Assembly Program
*
* M68HC11 Register definitions
*
PORTC EQU $1003 Port C control register
* “0,0,0,0;0,0,RS/, SHDN/”
DDRC EQU $1007 Port C data direction
PORTD EQU $1008 Port D data register
* “0,0,/CS,CLK;SDI,0,0,0”
DDRD EQU $1009 Port D data direction
SPCR EQU $1028 SPI control register
* “SPIE,SPE,DWOM,MSTR;CPOL,CPHA,SPR1,SPR0”
SPSR EQU $1029 SPI status register
* “SPIF,WCOL,0,MODF;0,0,0,0”
SPDR EQU $102A SPI data register; Read-Buffer; Write-Shifter
*
* SDI RAM variables: SDI1 is encoded from 0 (Hex) to 7 (Hex)
* SDI2 is encoded from 00 (Hex) to FF (Hex)
* AD8801/3 requires two 8-bit loads; upper 5 bits
* of SDI1 are ignored. AD8801/3 address bits in last
* three LSBs of SDI1.
*
SDI1 EQU $00 SDI packed byte 1 “0,0,0,0;0,A2,A1,A0”
SDI2 EQU $01 SDI packed byte 2 “DB7,DB6,DB5,DB4;DB3,DB2,DB1,DB0”
*
* Main Program
*
ORG $C000 Start of user’s RAM in EVB
INIT LDS #$CFFF Top of C page RAM
*
* Initialize Port C Outputs
*
LDAA #$03 0,0,0,0;0,0,1,1
* /RS-Hi, /SHDN-Hi
STAA PORTC Initialize Port C Outputs
LDAA #$03 0,0,0,0;0,0,1,1
STAA DDRC /RS and /SHDN are now enabled as outputs
*
* Initialize Port D Outputs
*
LDAA #$20 0,0,1,0;0,0,0,0
* /CS-Hi,/CLK-Lo,SDI-Lo
STAA PORTD Initialize Port D Outputs
LDAA #$38 0,0,1,1;1,0,0,0
STAA DDRD /CS,CLK, and SDI are now enabled as outputs
*
* Initialize SPI Interface
*
LDAA #$53
STAA SPCR SPI is Master,CPHA=0,CPOL=0,Clk rate=E/32
*
* Call update subroutine
*
BSR UPDATE Xfer 2 8-bit words to AD8402
JMP $E000 Restart BUFFALO
*
* Subroutine UPDATE
*
UPDATE PSHX Save registers X, Y, and A
