Si3452/3
Rev. 0.47 35
DOCUMENT CHANGE LIST
Revision 0.4 to Revision 0.41
VEE UVLO only. Due to the protection clamp, OVLO
is not supported.
Updated thermal information.
Removed support for pin-selectable auto mode
powerup.
Changed device status to device event flags in
Interrupt register.
Si3452 is dv/dt disconnect, and Si3457 is DC
disconnect.
Added "6. Operational Notes" on page 24.
Updated "12. Ordering Guide" on page 33.
Added "12.1. Evaluation Kits and Reference
Designs" on page 33.
Revision 0.41 to Revision 0.42
Updated Vdd typical current.
Updated logical levels.
Clarified port turn on commands
Made reset timing “TBD”. The timing for samples is
approximately 50 msec. There is an objective to
improve this, but the final reset time has not yet been
established.
Revision 0.42 to Revision 0.43
Added “-IM” industrial temp range devices.
Adjusted temp specs to accommodate -GM and -IM
grades.
Revision 0.43 to Revision 0.44
Removed I
2
C ARA and bus arbitration support.
Added low-priority port function.
Clarified port turn-on function.
Added minimum or maximum specs for parameters
that had been “TBD” or typical only.
Revision 0.44 to Revision 0.45
Updated Table 6, “VOUT Drive and Power-on
Specifications,” on page 7.
Updated Table 9, “SMBus (I2C) Electrical
Specifications,” on page 8.
Updated Figure 3 on page 11.
Updated "4. Functional Description" on page 12
Updated "4.4. Disconnect Detection" on page 14.
Updated "4.5. Transient Voltage Surge Suppression"
on page 14.
Updated "4.8. SMBus/I2C Interface Description" on
page 15.
Added Table 15, “I2C Address Byte Protocol,” on
page 16.
Updated "5.1. Interrupt (Registers 0x00–0x01)" on
page 17.
Updated "5.3. Port Status (Registers 0x06–0x09)" on
page 17.
Updated "5.4. Port Configuration (Registers 0x0A–
0x11)" on page 18.
Updated "5.5. Command and Return Registers
(Registers 0x12–0x1C)" on page 19.
Updated Table 18, “Device Status Bits,” on page 19.
Updated Table 19, “Si3452/3 Register Map,” on
page 20.
Updated Table 23, “Si3452/3 Port Configuration,” on
page 23.
Added "6.2. Changing the Interrupt Mask" on page
24.
Removed “8.4. Port Current Inaccuracies in dV/dt
Mode”.
Updated "12. Ordering Guide" on page 33.
Revision 0.45 to Revision 0.46
Updated Table 3, “UVLO, and Reset Specifications,”
on page 5.
Updated Table 6, “VOUT Drive and Power-on
Specifications,” on page 7.
Changed current limit to 2x for PoE+ mode.
Updated Table 10, “Address Pin Electrical
Specifications*,” on page 8.
Removed 2.2 V min limit for VIL.
Updated Table 11, “SMBus (I2C) Timing
Specifications (see Figure 1),” on page 9.
Changed data hold time to 200 nsec.
Updated text in "7. PCB Layout Guidelines" on page
25.
Updated text in "12.1. Evaluation Kits and Reference
Designs" on page 33.
Revision 0.46 to Revision 0.47
Changed SDA and SCL input low to 0.85 V.
Minor editorial corrections.
