1
DATASHEET
16-Bit Long-Reach Video Automotive Grade SERDES
with Bi-directional Side-Channel
ISL76321
The ISL76321 is a serializer/deserializer of LVCMOS parallel
video data. The video data presented to the serializer on the
parallel LVCMOS bus is serialized into a high-speed differential
signal. This differential signal is converted back to parallel video
at the remote end by the deserializer. It also transports auxiliary
data bi-directionally over the same link during the video vertical
retrace interval. I
2
C bus mastering allows the placement of
external slave devices on the remote side of the link. An I
2
C
controller can be placed on either side of the link allowing
bidirectional I
2
C communication through the link to the external
devices on the other side. Both chips can be fully configured from
a single controller or independently by local controllers.
Related Literature
ISL34341 Data Sheet “WSVGA 24-Bit Long-Reach Video
SERDES with Bi-directional Side-Channel”
Features
16-bit RGB transport over a single differential pair
6MHz to 50MHz pixel clock rates
AEC-Q100 qualified component
Bi-directional auxiliary data transport without extra bandwidth
and over the same differential pair
Hot-plugging with automatic resynchronization every HSYNC
•I
2
C bus mastering to the remote side of the link with a
controller on either the serializer or deserializer
Selectable clock edge for parallel data output
DC-balanced with industry standard 8b/10b line code allows
AC-coupling, providing immunity against ground shifts
16 programmable settings each for transmitter amplitude
boost and pre-emphasis and receiver equalization, allow for
longer cable lengths and higher data rates
Slew rate control and spread spectrum capability on outputs
reduce the potential for EMI
Same device for serializer and deserializer simplifies inventory
Applications
Video entertainment systems
•Remote cameras
SERIOP
SERION
27nF
27nF
SERIOP
SERION
27nF
27nF
ISL76321
DESERIALIZER
PCLK_IN
RGB
REF_CLK
PCLK_OUT
VSYNC
HSYNC
DE
VIDEO_TX
I2CA0
I2CA1
REF_RES
TEST_EN
GND_CR
GND_P
GND_AN
GND_TX
GND_CDR
GND_IO
RSTB/PDB
VDD_IO
VDD_CR
VDD_P
VDD_AN
VDD_TX
VDD_CDR
3.16k
3.3V 1.8V VDD_IO
16
VIDEO
TARGET
ISL76321
SERIALIZER
RGB
PCLK_IN
VSYNC
HSYNC
DE
VIDEO_TX
I2CA0
I2CA1
REF_RES
TEST_EN
GND_CR
GND_P
GND_AN
GND_TX
GND_CDR
GND_IO
RSTB/PDB
VDD_IO
VDD_CR
VDD_P
VDD_AN
VDD_TX
VDD_CDR
3.3V 1.8V VDD_IO
VDD_IO
16
VIDEO
SOURCE
3.16k
FIGURE 1. TYPICAL APPLICATION
May 1, 2015
FN7803.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
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ISL76321
2
FN7803.2
May 1, 2015
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Block Diagram
8b/10b
x20
RGB
V/H/ D E
SERIOP
SERION
SDA
16
3
PCLK_ OUT
x20
TX
RX
MUX
DEMUX
CDR
VCM
GENERATOR
I
2
C
SCL
PRE-
EMPHASIS
EQ
TDM
RAM
VIDEO_TX
(HI)
PCLK_IN
(REF_CLK WHEN
VIDEO_TX IS LO)
ISL76321
3
FN7803.2
May 1, 2015
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Pin Configuration
ISL76321
(48 LD QFN)
TOP VIEW
GND_IO
RGBA7
RGBA6
RGBA5
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37
RGBA4
RGBA3
RGBA2
RGBA1
RGBA0
PCLK_OUT
VDD_IO
GND_IO
GND_CR
VDD_CR
DATAEN
HSYNC
VSYNC
VHSYNCPOL
VIDEO_TX
PCLK_IN
GND_P
VDD_P
SCL
SDA
VDD_CDR
GND_CDR
VDD_TX
SERIOP
SERION
GND_TX
VDD_AN
GND_AN
REF_RES
MASTER
I2CA0
I2CA1
VDD_IO
RGBC0
RGBC1
RGBC2
RGBC3
RGBC4
RGBC5
RGBC6
RGBC7
STATUS
TEST_EN
RSTB/PDB
Pin Descriptions
PIN NUMBER PIN NAME
DESCRIPTION
SERIALIZER DESERIALIZER
47, 46
45, 44
43, 42
41, 40
9, 8
7, 6
5, 4
3, 2
RGBA7, RGBA6
RGBA5, RGBA4
RGBA3, RGBA2
RGBA1, RGBA0
RGBC7, RGBC6
RGBC5, RGBC4
RGBC3, RGBC2
RGBC1, RGBC0
Parallel video data LVCMOS inputs with Hysteresis Parallel video data LVCMOS outputs
16 HSYNC Horizontal (line) Sync LVCMOS input with Hysteresis Horizontal (line) Sync LVCMOS output
17 VSYNC Vertical (frame) Sync LVCMOS input with Hysteresis Vertical (frame) Sync LVCMOS output
15 DATAEN Video Data Enable LVCMOS input with Hysteresis Video Data Enable LVCMOS output
20 PCLK_IN Pixel clock LVCMOS input PLL reference clock LVCMOS input
39 PCLK_OUT Default; not used Recovered clock LVCMOS output
33, 32 SERIOP, SERION High-speed differential serial I/O High speed differential serial I/O

ISL76321ARZ-T7A

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Serializers & Deserializers - Serdes 48L QFN 7X7(PUNCHED) T&R, Auto
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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