CPC7584BC Datasheet CPC7584BA, CPC7584BB, CPC7584BC | P10-P12

CPC7584

10 www.clare.com Rev. B

Preliminary

2. Functional Description

2.1 Introduction

The CPC7584xA/B has four states:

• Talk. Line break switches SW1 and SW2 closed,

ringing switches SW3 and SW4 open, and test

switches SW5 and SW6 open.

• Ringing. Line break switches SW1 and SW2 open,

ringing switches SW3 and SW4 closed, and test-in

switches SW5 and SW6 open.

• Test. Line break switches SW1 and SW2 open,

ringing switches SW3 and SW4 open, and test-in

switches SW5 and SW6 closed.

• All off. Line break switches SW1 and SW2 open,

ringing switches SW3 and SW4 open, and loop test

switches SW5 and SW6 open.

The CPC7584xC replaces the Test state with the

Test/Monitor state as defined below.

• Test/Monitor. Line break switches SW1 and SW2

closed, ringing switches SW3 and SW4 open, and

test-in switches SW5 and SW6 closed.

The CPC7584 offers break-before-make and

make-before-break switching with simple logic-level

input control. Solid-state switch construction means no

impulse noise is generated when switching during ring

cadence or ring trip, eliminating the need for external

zero-cross switching circuitry. State-control is via

logic-level input so no additional driver circuitry is

required. The line break switches SW1 and SW2 are

linear switches that have exceptionally low RDS

and excellent matching characteristics. The ringing

access switch SW4 has a breakdown voltage rating of

greater than 480 V. This is sufficiently high, with proper

protection, to prevent breakdown in the presence of a

transient fault condition (i.e., passing the transient on

to the ring generator).

Integrated into the CPC7584 is a diode bridge/SCR

clamping circuit, current limiting, and a thermal

shutdown mechanism to provide protection to the

SLIC device during a fault condition. Positive and

negative surges are reduced by the current limiting

circuitry and steered to ground via diodes and the

integrated SCR. Power-cross transients are also

reduced by the current limiting and thermal shutdown

circuits. Note that only the CPC7584xA and

CPC7584xC parts include the integrated protection

SCR.

To protect the CPC7584 from an overvoltage fault

condition, use of a secondary protector is required.

The secondary protector must limit the voltage seen at

the tip and ring terminals to a level below the

maximum breakdown voltage of the switches. To

minimize the stress on the solid-state contacts, use of

a foldback or crowbar type secondary protector is

recommended. With proper selection of the secondary

protector, a line card using the CPC7582BC will meet

all relevant ITU, LSSGR, FCC and UL protection

requirements.

The CPC7584 operates from a +5 V supply only. This

gives the device extremely low idle and active power

dissipation and allows use with virtually any range of

battery voltage. A battery voltage is also used by the

CPC7584 as a reference for the integrated protection

circuit. In the event of a loss of battery voltage, the

CPC7584 enters the all-off state.

2.2 Switch Timing

The CPC7584 provides, when switching from the

ringing state to the idle/talk state, the ability to control

the release timing of the ringing access switches SW3

and SW4 relative to the state of the line break

switches SW1 and SW2 using simple logic-level input.

This is referred to a make-before-break or

break-before-make operation. When the line break

switch contacts (SW1 and SW2) are closed (or made)

before the ringing access switch contacts (SW3 and

SW4) are opened (or broken), this is referred to

make-before-break operation. Break-before-make

operation occurs when the ringing access contacts

(SW3 and SW4) are opened (broken) before the line

break switch contacts (SW1 and SW2) are closed

(made). With the CPC7584, the make-before-break

and break-before-make operations can easily be

selected by applying logic-level inputs to pins 9 and 10

(IN

RING

and IN

TEST-IN

) of the device.

The logic sequences for either mode of operation are

given in “Make-Before-Break Operation (Ringing to

Talk Transition)” on page 11 and “Break-Before-Make

Operation (Ringing to Talk Transition)” on page 11.

Logic states and explanations are given in “Truth Table

- CPC7584xA/B” on page 9.

Break-before-make operation can also be achieved

using pin 7 (TSD) as an input. In “Break-Before-Make

Operation (Ringing to Talk Transition)” on page 11

lines 2 and 3, it is possible to induce the switches to

the all-off state by grounding pin 7 (TSD) instead of

CPC7584

Rev. B www.clare.com 11

Preliminary

apply logic input to the pins. This has the effect of

overriding the logic inputs and forcing the device to the

all-off state. Hold this input state for 25 ms. During this

hold period, toggle the inputs from the ringing state

(10) to the idle/talk state (00). After the 25 ms, release

pin 7 (TSD) to return the switch control to the input

pins 9 and 10 and reset the device to the idle/talk

state.

Setting TSD to +5 V allows switch control using the

logic pins 9 and 10. This setting, however, also

disables the thermal shutdown circuit and is therefore

not recommended. When using logic controls via the

input pins 9 and 10, pin 7 (TSD) should be allowed to

float. As a result, the two recommended states when

using pin 7 (TSD) as a control are 0, which forces the

device to the all-off state, or float, which allows logic

inputs to pins 9 and 10 to remain active. This may

require the use of an open-collector buffer.

2.2.1 Make-Before-Break Operation (Ringing to Talk Transition)

2.2.2 Break-Before-Make Operation (Ringing to Talk Transition)

2.2.3 Alternate Break-Before-Make Operation

Break-before-make operation can also be achieved

using TSD as an input. In lines 2 and 3 of

“Break-Before-Make Operation (Ringing to Talk

Transition)” on page 11, instead of using the logic

input pins to force the all-off state, force TSD to

ground. This overrides the logic inputs and also forces

the all off state. Hold this state for 25 ms. During this

25 ms all-off state, toggle the inputs from the ringing

state (Ring = 5 V, Test-In = 0 V) to the idle/talk state

(Ring = 0 V, Test-In=0 V). After 25 ms, release TSD to

return switch control to the input pins which will set the

idle talk state.

When using the CPC7584 in this mode, forcing TSD to

ground overrides the input pins and force an all off

state. Setting TSD to +5 V allows switch control via the

logic input pins. However, setting TSD to +5 V also

disables the thermal shutdown mechanism. This is not

recommended. Therefore, to allow switch control via

the logic input pins, allow TSD to float.

When using TSD as an input, the two recommended

states are 0 (overrides logic input pins and forces all

off state) and float (allows switch control via logic input

pins and the thermal shutdown mechanism is active).

This may require use of an open-collector buffer.

State

RINGING

TEST

Timing

Break

Switches

Ringing

Return

Switch

(SW3)

Ringing

Switch

(SW4)

Test

Switches

Ringing 1 0 Floating - Open Closed Closed Open

Make-

before-

break

0 0 Floating

SW4 waiting for next zero-current crossing

to turn off. Maximum time is one-half of

ringing. In this transition state, current that is

limited to the dc break switch current limit

value will be sourced from the ring node of

the SLIC.

Closed Open Closed Open

Talk 0 0 Floating Zero-cross current has occurred Closed Open Open Open

State

RINGING

TEST

Timing

Break

Switches

Ringing

Return

Switch

(SW3)

Ringing

Switch

(SW4)

Test

Switches

Ringing 1 0 Floating - Open Closed Closed Open

All-off 1 1 Floating

Hold this state for at least 25 ms. SW4

waiting for zero current to turn off.

Open Open

Closed

Open

SW4 has opened. Open

Talk 0 0 Floating Close Break Switches Closed Open Open Open

CPC7584

12 www.clare.com Rev. B

Preliminary

2.3 Ring Access Switch Zero-Cross Current Turn Off

After the application of a logic input to turn SW4 off,

the ring access switch is designed to delay the change

in state until the next zero-crossing. Once on, the

switch requires a zero-current cross to turn off, and

therefore should not be used to switch a pure DC

signal. The switch will remain in the on state no matter

what logic input until the next zero crossing. For proper

operation, pin 12 (R

RING

) should be connected using

proper impedance to a ring generator or other AC

source. These switching characteristics will reduce

and possibly eliminate overall system impulse noise

normally associated with ringing access switches. The

attributes of ringing access switch SW4 may make it

possible to eliminate the need for a zero-cross

switching scheme. A minimum impedance of 300 Ω in

series with the ring generator is recommended.

2.4 Power Supplies

Both a +5 V supply and battery voltage are connected

to the CPC7584. CPC7584 switch state control is

powered exclusively by the +5 V supply. As a result,

the CPC7584 exhibits extremely low power dissipation

during both active and idle states.

The battery voltage is not used for switch control but

rather as a reference for the integrated secondary

protection circuitry. The integrated SCR is designed to

trigger when pin 3 (T

BAT

) or pin 14 (R

BAT

) drops 2 to

4 V below the battery. This trigger prevents a fault

induced overvoltage event at the T

BAT

or R

BAT

nodes.

2.5 Battery Voltage Monitor

The CPC7584 also uses the voltage reference to

monitor battery voltage. If battery voltage is lost, the

CPC7582BC immediately enters the all-off state. It

remains in this state until the battery voltage is

restored. The device also enters the all-off state if the

battery voltage rises above –10 V and remains in the

all-off state until the battery voltage drops below

–15 V. This battery monitor feature draws a small

current from the battery (less than 1 mA typical) and

will add slightly to the device’s overall power

dissipation.

2.6 Protection

2.6.1 Diode Bridge/SCR

The CPC7584 uses a combination of current limited

break switches, a diode bridge/SCR clamping circuit,

and a thermal shutdown mechanism to protect the

SLIC device or other associated circuitry from damage

during line transient events such as lightning. During a

positive transient condition, the fault current is

conducted through the diode bridge to ground. Voltage

is clamped to the diode drop above ground. During a

negative transient of 2 to 4 V more negative than the

battery, the SCR conducts and faults are shunted to

ground via the SCR and diode bridge.

In order for the SCR to crowbar or foldback, the on

voltage (see “Protection Circuitry Electrical

Specifications” on page 8) of the SCR must be less

negative than the battery reference voltage. If the

battery voltage is less negative the SCR on voltage,

the SCR will not crowbar, however it will conduct fault

currents to ground.

For power induction or power-cross fault conditions,

the positive cycle of the transient is clamped to the

diode drop above ground and the fault current directed

to ground. The negative cycle of the transient will

cause the SCR to conduct when the voltage exceeds

the battery reference voltage by two to four volts,

steering the current to ground.

2.6.2 Current Limiting function

If a lightning strike transient occurs when the device in

the talk/idle state, the current is passed along the line

to the integrated protection circuitry and limited by the

dynamic current limit response of break switches SW1

and SW2. When a 1000V 10/1000 pulse (LSSGR

lightning) is applied to the line though a properly

clamped external protector, the current seen at pins 2

BAT

) and pin 15 (R

BAT

) will be a pulse with a typical

magnitude of 2.5 A and a duration of less than 0.5 ms.

If a power-cross fault occurs with the device in the

talk/idle state, the current is passed though break

switches SW1 and SW2 on to the integrated

protection circuit and is limited by the dynamic DC

current limit response of the two break switches. The

DC current limit, specified over temperature, is

between 80 mA and 425 mA, and the circuitry has a

negative temperature coefficient. As a result, if the

device is subjected to extended heating due to power

cross fault, the measured current at pin 2 (T

BAT

) and

pin 15 (R

BAT

) will decrease as the device temperature

increases. If the device temperature rises sufficiently,

the temperature shutdown mechanism will activate

and the device will default to the all-off state.

2.7 Temperature Shutdown

The thermal shutdown mechanism will activate when

the device temperature reaches a minimum of 110° C,

placing the device in the all-off state regardless of

logic input. During thermal shutdown mode, pin 7

(TSD) will read 0 V. Normal output of TSD is +V

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CPC7584BC

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CPC7584BC

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