74LV4020_1 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 01 — 29 November 2005 13 of 20
Philips Semiconductors
74LV4020
14-stage binary ripple counter
Test data is given in Table 9.
Definitions for test circuit:
R
L
= Load resistor.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
Fig 9. Load circuitry for switching times
Table 9: Test data
Supply voltage Input Load Test
V
CC
V
I
t
r
, t
f
C
L
R
L
1.2 V V
CC
≤ 2.5 ns 50 pF 1 kΩ t
PHL
, t
PLH
2.0 V V
CC
≤ 2.5 ns 50 pF 1 kΩ t
PHL
, t
PLH
2.7 V 2.7 V ≤ 2.5 ns 50 pF 1 kΩ t
PHL
, t
PLH
3.0 V to 3.6 V 2.7 V ≤ 2.5 ns 50 pF, 15 pF 1 kΩ t
PHL
, t
PLH
4.5 V to 5.5 V V
CC
≤ 2.5 ns 50 pF 1 kΩ t
PHL
, t
PLH
V
CC
V
I
V
O
001aaa663
D.U.T.
C
L
50 pF
R
T
R
L
1 kΩ
PULSE
GENERATOR
