Data Sheet ADuM4154
ELECTRICAL CHARACTERISTICSMIXED 3.3 V/5 V OPERATION
All typical specifications are at T
A
= 25°C and V
DD1
= 3.3 V, V
DD2
= 5 V. Minimum and maximum specifications apply over the entire
recommended operation range: 3.0 V ≤ V
DD1
3.6 V, 4.5 V ≤ V
DD2
5.5 V, and 40°C T
A
+125°C, unless otherwise noted. Switching
specifications are tested with C
L
= 15 pF and CMOS signal levels, unless otherwise noted.
Table 8. Switching Specifications
Parameter Symbol
A Grade B Grade
Unit Test Conditions/Comments Min Typ Max Min Typ Max
MCLK, MO, SO
SPI Clock Rate SPI
MCLK
1 15.6 MHz
Data Rate Fast (MO, SO) DR
FAS T
2 34 Mbps Within PWD limit
Propagation Delay t
PHL
, t
PLH
28 17 ns 50% input to 50% output
Pulse Width PW 100 12.5 ns Within PWD limit
Pulse Width Distortion PWD 2 2 ns |t
PLH
− t
PHL
|
Codirectional Channel Matching
1
t
PSKCD
2 2 ns
Jitter, High Speed
J
HS
1
1
ns
MSS
Jitter 1 1 ns
Data Rate Fast DR
FAS T
2 34 Mbps Within PWD limit
Propagation Delay t
PHL
, t
PLH
28 21 28 ns 50% input to 50% output
Pulse Width PW 100 12.5 ns Within PWD limit
Pulse Width Distortion PWD 2 2 ns |t
PLH
− t
PHL
|
Setup Time
2
MSS
SETUP
1.5 10 ns
Jitter, High Speed J
HS
1 1 ns
SSA0, SSA1
Data Rate Slow DR
SLOW
250 250 kbps Within PWD limit
Propagation Delay t
PHL
, t
PLH
0.1 2.6 0.1 2.6 µs 50% input to 50% output
Pulse Width PW 4 4 µs Within PWD limit
Jitter, Low Speed J
LS
2.5 2.5 µs |t
PLH
− t
PHL
|
SSAx
3
Minimum Input Skew
4
t
SSAx SKEW
3
40 40 ns
1
Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation
barrier.
2
The
MSS
signal is glitch filtered in both speed grades, whereas the other fast signals are not glitch filtered in the B grade. To guarantee that
MSS
reaches the output
ahead of another fast signal, set up
MSS
prior to the competing signal by different times depending on speed grade.
3
SSAx = SSA0 or SSA1.
4
An internal asynchronous clock, not available to users, samples the low speed signals. If edge sequence in codirectional channels is critical to the end application, the
leading pulse must be at least 1 t
SSAx SKEW
ahead of a later pulse to guarantee the correct order or simultaneous arrival at the output.
Rev. A | Page 9 of 22
ADuM4154 Data Sheet
Table 9. For All Models
1, 2, 3
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
SUPPLY CURRENT
A Grade and B Grade I
DD
3.4 6.5 mA C
L
= 0 pF, DR
FAS T
= 1 MHz,
DR
SLOW
= 0 MHz
I
DD2
6.5 13 mA C
L
= 0 pF, DR
FAS T
= 1 MHz,
DR
SLOW
= 0 MHz
B Grade I
DD
11.7 15 mA C
L
= 0 pF, DR
FAS T
= 17 MHz,
DR
SLOW
= 0 MHz
I
DD2
13.5 19 mA C
L
= 0 pF, DR
FAS T
= 17 MHz,
DR
SLOW
= 0 MHz
DC SPECIFICATIONS
MCLK,
MSS
, MO, SO, SSA0, SSA1
Input Threshold
Logic High V
IH
0.7 × V
DDx
V
Logic Low V
IL
0.3 × V
DDx
V
Input Hysteresis V
IHYST
500 mV
Input Current per Channel I
I
−1 +0.01 +1 µA 0 V V
INPUT
≤ V
DDx
SCLK, MI, SI, SS0, SS1, SS2, SS3
Output Voltages
Logic High V
OH
V
DDx
− 0.1 5.0 V I
OUTPUT
= −20 µA, V
INPUT
= V
IH
V
DDx
− 0.4 4.8 V I
OUTPUT
= −4 mA, V
INPUT
= V
IH
Logic Low V
OL
0.0 0.1 V I
OUTPUT
= 20 µA, V
INPUT
= V
IL
0.2 0.4 V I
OUTPUT
= 4 mA, V
INPUT
= V
IL
V
DD1
, V
DD2
Undervoltage Lockout
UVLO
2.6
V
Supply Current for All Low Speed Channels
Quiescent Input I
DD1Q)
2.9 mA
Quiescent Output I
DD2(Q)
6.1 mA
AC SPECIFICATIONS
Output Rise/Fall Time t
R
/t
F
2.5 ns 10% to 90%
Common-Mode Transient Immunity
4
|CM| 25 35 kV/µs V
INPUT
= V
DDx
, V
CM
= 1000 V,
transient magnitude = 800 V
1
V
DDx
= V
DD1
or V
DD2
.
2
V
INPUT
is the input voltage of any of the MCLK,
MSS
, MO, SO, SSA0, or SSA1 pins.
3
I
OUTPUT
is the output current of any of the SCLK, MI, SI, SS0, SS1, SS2, or SS3 pins.
4
|CM| is the maximum common-mode voltage slew rate that can be sustained whereas maintaining output voltages within the V
OH
and V
OL
limits. The common-mode
voltage slew rates apply to both rising and falling common-mode voltage edges.
PACKAGE CHARACTERISTICS
Table 10.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
Resistance (Input to Output)
1
R
I-O
10
12
Capacitance (Input to Output)
1
C
I-O
1.0 pF f = 1 MHz
Input Capacitance
2
C
I
4.0 pF
IC Junction to Ambient Thermal Resistance θ
JA
46 °C/W Thermocouple located at center of package underside
1
The device is considered a 2-terminal device: Pin 1 through Pin 10 are shorted together, and Pin 11 through Pin 20 are shorted together.
2
Input capacitance is from any input data pin to ground.
Rev. A | Page 10 of 22
Data Sheet ADuM4154
REGULATORY INFORMATION
The ADuM4154 is approved and pending approval by the organizations listed in Table 11. See Table 16 and the Insulation Lifetime
section for recommended maximum working voltages for specific cross isolation waveforms and insulation levels.
Table 11.
UL CSA VDE
Recognized Under UL 1577
Component Recognition Program
1
Approved under CSA Component Acceptance
Notice #5A
Certified according to DIN V VDE V 0884-10
(VDE V 0884-10):2006-12
2
5000 V rms Single Protection Basic insulation per CSA 60950-1-07+A1+A2 and
IEC 60950-12nd Ed+A1+A2., 800 V rms (1131 V
peak) maximum working voltage
3
Reinforced insulation, 849 V peak
CSA 60950-1-07+A1+A2 and IEC 60950-1 2
nd
Ed.+A1+A2, 400 V rms (565 V peak) maximum
working voltage
Reinforced insulation (2MOPP) per IEC 60601-1
Ed.3.1, 250 V rms (353 V peak) maximum working
File E214100
File 205078
File 2471900-4880-0001
1
In accordance with UL 1577, each ADuM4154 is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 second (current leakage detection limit = 5 µA).
2
In accordance with DIN V VDE V 0884-10, each ADuM4154 is proof tested by applying an insulation test voltage ≥ 1590 V peak for 1 second (partial discharge
detection limit = 5 pC). The asterisk (*) marked on the component designates DIN V VDE V 0884-10
approval.
3
Use at working voltages above 400 V
AC
RMS
shortens lifetime of the isolator significantly. See Table 16 for recommended maximum working voltages under ac and dc conditions.
INSULATION AND SAFETY RELATED SPECIFICATIONS
Table 12.
Parameter Symbol Value Unit Test Conditions/Comments
Rated Dielectric Insulation Voltage 5000 V rms 1 minute duration
Minimum External Air Gap (Clearance) L(I01) 8.3 mm min Measured from input terminals to output terminals,
shortest distance through air
Minimum External Tracking (Creepage) L(I02) 8.3 mm min Measured from input terminals to output terminals,
shortest distance path along body
Minimum Internal Gap (Internal Clearance) 0.017 mm min Distance through insulation
Tracking Resistance (Comparative Tracking Index) CTI >400 V DIN IEC 112/VDE 0303 Part 1
Material Group II Material group (DIN VDE 0110, 1/89, Table 1)
Rev. A | Page 11 of 22

ADUM4154ARIZ-RL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital Isolators Multip Slave Isolatr for SPI Intrface
Lifecycle:
New from this manufacturer.
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