ister using a hysteresis. The alarm window provides a comparison window, with upper
and lower limits set in the alarm upper boundary register and the alarm lower boundary
register, respectively. When the alarm window is enabled, EVENT# will trigger whenever
the temperature is outside the MIN or MAX values set by the user.
The interrupt mode enables software to reset EVENT# after a critical temperature
threshold has been detected. Threshold points are set in the configuration register by
the user. This mode triggers the critical temperature limit and both the MIN and MAX of
the temperature window.
The compare mode is similar to the interrupt mode, except EVENT# cannot be reset by
the user and returns to the logic HIGH state only when the temperature falls below the
programmed thresholds.
Critical temperature mode triggers EVENT# only when the temperature has exceeded
the programmed critical trip point. When the critical trip point has been reached, the
temperature sensor goes into comparator mode, and the critical EVENT# cannot be
cleared through software.
SMBus Slave Subaddress Decoding
The temperature sensor’s physical address differs from the SPD EEPROM’s physical ad-
dress: binary 0011 for A0, A1, A2, and RW#, where A2, A1, and A0 are the three slave sub-
address pins and the RW# bit is the READ/WRITE flag.
If the slave base address is fixed for the SPD EEPROM/temperature sensor, then the pins
set the subaddress bits of the slave address, enabling the devices to be located anywhere
within the eight slave address locations. For example, they could be set from 30h to 3Eh.
Serial Presence-Detect Data
For the latest serial presence-detect data, refer to Micron's SPD page:
www.micron.com/SPD.
32GB (x72, ECC, QR) 240-Pin DDR3 LRDIMM
Temperature Sensor with Serial Presence-Detect EEPROM
PDF: 09005aef83b62686
jszs72c4gx72lz.pdf - Rev. F 2/15 EN
17
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© 2010 Micron Technology, Inc. All rights reserved.
