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NBA3N206SDG

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18
© Semiconductor Components Industries, LLC, 2015
October, 2015 − Rev. 3
1 Publication Order Number:
NBA3N206S/D
NBA3N206S
3.3 V Automotive Grade
M-LVDS Driver Receiver
Description
The NBA3N206S is a 3.3 V supply differential Multipoint Low
Voltage (M−LVDS) line Driver and Receiver for automotive
applications. NBA3N206S offers the Type 2 receiver threshold at
0.1 V.
The NBA3N206S has Type−2 receivers that detect the bus state with
as little as 50 mV of differential input voltage over a common−mode
voltage range of −1 V to 3.4 V. Type−2 receivers include an offset
threshold to provide a detectable voltage under open−circuit, idle−bus,
and other faults conditions.
NBA3N206S supports Simplex or Half Duplex bus configurations.
Features
• Low−Voltage Differential 30 W to 55 W Line Drivers and Receivers
for Signaling Rates Up to 200 Mbps
• Type−2 Receivers Provide an Offset (100 mV) Threshold to Detect
Open−Circuit and Idle−Bus Conditions
• Controlled Driver Output Voltage Transition Times for Improved
Signal Quality
• −1 V to 3.4 V Common−Mode Voltage Range Allows Data Transfer
With up to 2 V of Ground Noise
• Bus Pins High Impedance When Disabled or VCC ≤ 1.5 V
• M−LVDS Bus Power Up/Down Glitch Free
• Operating range: VCC = 3.3 ±10% V( 3.0 to 3.6 V)
• Operation from –40°C to +125°C.
• AEC−Q100 Qualified and PPAP Capable
• These are Pb−Free Devices
Applications
• Low−Power High−Speed Short−Reach Alternative to TIA/EIA−485
• Backplane or Cabled Multipoint Data and Clock Transmission
• Cellular Base Stations
• Central−Office Switches
• Network Switches and Routers
• Automotive
MARKING
DIAGRAM
www.onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 17 of this data sheet.
ORDERING INFORMATION
SOIC−8
D SUFFIX
CASE 751
1
8
NA206
AYWW
G
1
8
NA206 = Specific Device Code
A = Assembly Location
Y = Year
WW = Work Week
G or G = Pb−Free Package
NBA3N206S
www.onsemi.com
2
Figure 1. Logic Diagram
B
GND
V
CC
DE A
RE
D
R
1
2
3
4
8
7
6
5
SOIC−8
Figure 2. Pinout Diagram
(Top View)
Table 1. PIN DESCRIPTION
Number Name I/O Type Open Default Description
1 R LVCMOS Output Receiver Output Pin
2 RE LVCMOS Input High Receiver Enable Input Pin (LOW = Active, HIGH = High Z
Output)
3 DE LVCMOS Input Low Driver Enable Input Pin (LOW = High Z Output, HIGH=Active)
4 D LVCMOS Input Driver Input Pin
5 GND Ground Supply pin. Pin must be connected to power supply to
guarantee proper operation.
6 A M−LVDS Input
/Output
Transceiver True Input /Output Pin
7 B M−LVDS Input
/Output
Transceiver Invert Input /Output Pin
8 VCC Power Supply pin. Pin must be connected to power supply to
guarantee proper operation.
Table 2. DEVICE FUNCTION TABLE
TYPE 2 Receiver
Inputs Output
V
ID
= V
A
− V
B
RE R
V
ID
w 150 mV L H
50 mV < V
ID
< 150 mV L ?
V
ID
≤ 50 mV L L
X H Z
X Open Z
Open L L
DRIVER
Input Enable Output
D DE A / Y B / Z
L H L H
H H H L
Open H L H
X Open Z Z
X L Z Z
H = High, L = Low, Z = High Impedance, X = Don’t Care, ? = Indeterminate
NBA3N206S
www.onsemi.com
3
Table 3. ATTRIBUTES (Note 1)
Characteristics
Value
ESD
Protection
Human Body Model (JEDEC
Standard 22, Method A114−A)
A, B
All Pins
±6 kV
±2 kV
Machine Model All Pins ±200 V
Charged –Device Model (JEDEC
Standard 22, Method C101)
All Pins ±1500 V
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Level 1
Flammability Rating
Oxygen Index
UL−94 code V−0 A 1/8”
28 to 34
Transistor Count 917 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 4. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V
CC
Supply Voltage −0.5 ≤ V
CC
≤ 4.0 V
V
IN
Input Voltage
D, DE, RE −0.5 ≤ V
IN
≤ 4.0
V
A, B −1.8 ≤ V
IN
≤ 4.0
I
OUT
Output Voltage R
A, B
−0.3 ≤ I
OUT
≤ 4.0
−1.8 ≤ I
OUT
≤ 4.0
V
T
A
Operating Temperature Range, Industrial −40 to ≤ +125 °C
T
stg
Storage Temperature Range −65 to +150 °C
θ
JA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
SOIC−8 190
130
°C/W
°C/W
θ
JC
Thermal Resistance (Junction−to−Case) (Note 2) SOIC−8 41 to 44 °C/W
T
sol
Wave Solder 265 °C
P
D
Power Dissipation (Continuous) T
A
= 25°C
25°C < T
A
< 125°C
T
A
= 125°C
725
5.8
377
mW
mW/°C
mW
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
2. JEDEC standard multilayer board − 2S2P (2 signal, 2 power).
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18

NBA3N206SDG

Mfr. #:
Buy NBA3N206SDG
Manufacturer:
ON Semiconductor
Description:
Clock Buffer MLVDS DRIVER RECEIVER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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