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NCP1339HDR2G

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L1
N
EMI
Filter
Vbulk
R2
2.2k
R1
2.2k
D2
D1
Rbo_H
Rbo_L
HV
GND
BO_OK
Figure 46. Simplified View of the Brown−out Circuitry
When the HV pin voltage drops below the V
BO(stop)
threshold (93 V typically) for more than the 50−ms blanking
time (T
BO(stop)
), the brown−out protection trips: the
controller stops generating DRV pulses and maintains V
cc
to
the 5.5−V V
CC(bias)
level. This state is maintained by the
high−voltage current−source until the input voltage happens
to exceed the brown−out upper threshold (V
BO(start)
that is
101 V typically). At that moment, the controller briefly
grounds the V
cc
capacitor to make a fresh start−up sequence
with soft−start.
Please note that the HV start−up current is not reduced for
the time when V
CC
is below V
CC(inhibit)
(as it happens when
the power supply is first plugged in) not to delay the power
supply recovery.
If a brown−out event occurs during the V
cc
capacitor
charge phase, the start−up phase is interrupted but the V
cc
pin is not grounded to make a fresh restart. The start−up
resumes as soon as the line recovers (terminating the
brown−out situation).
Figure 47. Internal Circuit Implements a 50−ms Timeout to Accommodate with Full−wave Rectification
NCP1339
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20
X2 Discharge Circuitry
The NCP1339 X2 discharge circuitry in Figure 48 uses a
dedicated pin (X2) together with an external charge
pump−based sensing network to detect the presence or the
absence of the mains. Owing to this simple external source,
the X2 circuitry is independent from the rest of the controller
that can be fully disabled in the off mode. A 100−ms timeout
block makes sure the X2 discharge switch is only activated
upon a real mains loss (when the user unplugs the converter)
and not when a parasitic ac line dropout occurs. The internal
V
cc
discharge switch is activated once the X2 timer elapses.
At that moment, the HV startup current source is enabled
and pumps out the energy stored by the X2 capacitors.
L1
N
EMI
Filter
Vbulk
R2
2.2k
R1
2.2k
D2
D1
HV
X2
R5
C1
D3
C2
R6
D4
X2 Capacitor
Discharge Circuitry
Vcc
C3
GND
HV
Startup
Figure 48. Simplified Block Diagram of X2 Capacitor Discharge Circuitry
An over temperature protection block monitors the
junction temperature during the discharge process and
avoids thermal runaway, in particular during open/short pins
safety tests. Please note that the X2 discharge capability is
also active during off−mode but also before the controller
actually starts to pulse (e.g. if the user unplugs the converter
during the start−up sequence).
Power Savings Mode
The NCP1339 features a dedicated input (remote pin) that
allows the user to activate an ultra−low consumption mode.
Figure 49 describes the internal arrangement of the remote
circuitry. In normal operation, the optocoupler is biased
from the secondary side and pulls the remote pin to ground.
When the secondary−side circuitry decides to release the
optocoupler, the remote pin level starts to grow. It is lifted
up by R
1
connected to the auxiliary V
cc
. C
3
, R
1
and R
2
introduce a time constant that prevents the converter from
entering the off mode immediately, in case spurious noise
would appear on the opto LED bias current. When the
voltage across C
2
eventually reaches 8 V, the controller
enters the off mode. In the absence of pulses, the auxiliary
no longer maintains V
cc
that slowly vanishes to 0. At this
moment, the X2 monitoring circuit is the only living block
and the IC power consumption is reduced to an extremely
low level. The voltage on the REM pin starts to fall. When
it reaches the re−start level (1.5 V), the controller resumes
operation and initiates a fresh start−up sequence. If no
secondary−side signal appears to bias the optocoupler LED,
a new self−relaxing cycle takes place when the REM pin
voltage reaches 8 V. If a secondary−side signal biases
optocoupler before the REM pin voltage has reached 8 V, the
power supply operates normally.
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Figure 49. Simplified Block Diagram of the Remote Control Input
V_REM_off
Vcc
C2
GND
REM to Vcc
management
R2
R1
C3
D2
D1
C1
REM
In summary, the REM pin works as follows:
• When pulled below a certain level (V_REM_on, 1.5 V
typical), the power supply operates normally. As
capacitors are connected to this pin, it is important to
discharge them properly during the start−up sequence.
A 100−ms timer performs this function by pulling the
pin to ground. It is operating in any re−start conditions
(brown−out recovery, short−circuit, latch reset and so
on) except in the self−relaxing PSM mode ( during
which the voltage on the pin swings up and down.
• When brought above a certain level (V_REM_off, 8 V
typical), the power supply stops working. In the
absence of an external bias, the remote pin starts to
drop at a pace imposed by the various time constants
around it. During this mode, despite the absence of V
cc
,
the X2 discharge circuitry remains active and monitors
the ac input line.
Fault Input
The NCP1339 includes a dedicated fault input accessible
via the Fault pin. Figure 50 shows the architecture of the
Fault input. The controller can be latched by pulling up the
pin above the upper fault threshold, V
Fault(OVP)
, typically
3.0 V. An active clamp prevents the Fault pin voltage from
reaching the V
Fault(OVP)
if the pin is open. To reach the upper
threshold, the external pull−up current has to be higher than
the pull−down capability of the clamp (set by R
Fault(clamp)
at
V
Fault(clamp)
), i.e., approximately 1 mA.
This function is typically used to detect a V
CC
or auxiliary
winding overvoltage by means of a Zener diode generally in
series with a small resistor (see Figure 50).
Neglecting the resistor voltage drop, the OVP threshold is
then:
V
AUX(OVP)
+ V
Z
) V
Fault(OVP)
,
(eq. 4)
where VZ is the Zener diode voltage.
The controller can also be latched off if the Fault pin
voltage, V
Fault
, is pulled below the lower fault threshold,
V
Fault(OTP_in)
, typically 0.4 V. This capability is normally
used for detecting an overtemperature fault by means of an
NTC thermistor. A pull up current source I
Fault(OTP)
,
(typically 45.5 mA) generates a voltage drop across the
thermistor. The resistance of the NTC thermistor decreases
at higher temperatures resulting in a lower voltage across the
thermistor. The controller detects a fault once the thermistor
voltage drops below V
Fault(OTP_in)
.
The circuit detects an overtemperature situation when:
R
NTC
@ I
Fault(OTP)
+ V
Fault(OTP)
.
(eq. 5)
Hence, the OTP protection trips when
R
NTC
+
V
Fault(OTP)
I
Fault(OTP)
(eq. 6)
that is 8.8 kohms typically.
The controller bias current is reduced during power up by
disabling most of the circuit blocks including I
Fault(OTP)
.
This current source is enabled once V
CC
reaches V
CC(on)
. A
bypass capacitor is usually connected between the Fault and
GND pins. It will take some time for V
Fault
to reach its steady
state value once I
Fault(OTP)
is enabled. Therefore, the lower
fault comparator (i.e. overtemperature detection) is ignored
during soft−start.
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NCP1339HDR2G

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Buy NCP1339HDR2G
Manufacturer:
ON Semiconductor
Description:
Switching Controllers HIGH VOLTAGE QUASI R
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