EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 (510) 668-7000 FAX (510) 668-7017
ST16C552
ST16C552A
PLCC Package
DUAL UART WITH 16-BYTE FIFO AND
PARALLEL PRINTER PORT
December 2003
Rev. 3.40
DESCRIPTION
The ST16C552/ST16C552A (552/552A) is a dual universal asynchronous receiver and transmitter (UART) with
an added bi-directional parallel port that is directly compatible with a CENTRONICS type printer. The parallel port
is designed such that the user can configure it as general purpose I/O interface, or for connection to other printer
devices. The 552/552A provides enhanced UART functions with 16 byte FIFO’s, a modem control interface, and
data rates up to 1.5Mbps. Onboard status registers provide the user with error indications and operational status.
The system interrupts and control may be tailored to meet user requirements. An internal loop-back capability
allows onboard diagnostics. A programmable baud rate generator is provided to select transmit and receive clock
rates from 50 bps to 1.5 Mbps. The 552/552A is available in a 68 pin PLCC package. The 552/552A is compatible
with the 16C450 and 16C550. The difference between the ST16C552 and ST16C552A is the logic state of the
printer port, INTP interrupt. The INTP interrupt is active high (logic 1) on the ST16C552 whereas INTP is active
low (logic 0) on the ST16C552A part when the interrupt latch mode is selected. The 552/552A is fabricated in an
advanced CMOS process with power down mode to reduce the power consumption. The 552A does not support
the power down mode.
INTB
INTP
-SLCTIN
INIT
-AUTOFDXT
-STROBE
GND
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
INTA
RDOUT
-RXRDYA
-CDB
GND
-RIB
-DSRB
CLK
-CSB
GND
BIDEN
ACK
PE
-BUSY
SLCT
VCC
ERROR
RXB
-RXRDYB
GND
-CTSA
-CDA
-RIA
-DSRA
-CSA
A2
A1
A0
-IOW
-IOR
-CSP
-RESET
VCC
RXA
-TXRDYB
INTSEL
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
ST16C552CJ68
ST16C552ACJ68
TXB
-DTRB
-RTSB
-CTSB
D0
D1
D2
D3
D4
D5
D6
D7
-TXRDYA
VCC
-RTSA
-DTRA
TXA
FEATURES
Added features in device revision "F" and newer:
5V Tolerant Inputs
Pin to pin and functional compatible to ST16C452/
452PS, TL16C552
2.97 to 5.5 volt operation
Software compatible with INS8250, NS16C550
1.5 Mbps transmit/receive operation (24MHz)
16 byte transmit FIFO
16 byte receive FIFO with error flags
Independent transmit and receive control
Modem and printer status registers
UART port and printer port Bi-directional
Printer port direction set by single control bit or 8 bit
pattern (AA/55)
Modem control signals (-CTS, -RTS, -DSR, -DTR,
-RI, -CD)
Programmable character lengths (5, 6, 7, 8)
Even, odd, or no parity bit generation and detection
TTL compatible inputs, outputs
Power down mode
ORDERING INFORMATION
Part number Pins Package Operating temperature Device Status
ST16C552CJ68 68 PLCC 0° C to + 70° C Active
ST16C552ACJ68 68 PLCC 0° C to + 70° C Active
ST16C552IJ68 68 PLCC -40° C to + 85° C Active
ST16C552AIJ68 68 PLCC -40° C to + 85° C Active
2
ST16C552/552A
Rev. 3.40
Figure 1, Block Diagram
-DTR A,B
-RTS A,B
-CTS A,B
-RI A,B
-CD A,B
-DSR A,B
TX A,B
RX A,B
Modem
Control
Logic
Transmit
FIFO
Registers
Transmit
Shift
Register
Receive
FIFO
Registers
Receive
Shift
Register
Clock
&
Baud Rate
Generator
Printer
Data
Ports
PD0-PD7
Printer
Control
Logic
-STROBE
INIT
-AUTOFDX
-SELCTIN
PE, SELECT
-BUSY, -ACK
ERROR
3
ST16C552/552A
Rev. 3.40
SYMBOL DESCRIPTION
Symbol Pin Signal Type Pin Description
A0 35 I Address-0 Select Bit - Internal registers address selection.
A1 34 I Address-1 Select Bit - Internal registers address selection.
A2 33 I Address-2 Select Bit - Internal registers address selection.
-ACK 68 I Acknowledge (with internal pull-up) - General purpose input
or line printer acknowledge (active low). a logic 0 from the
printer, indicates successful data transfer to the print buffer.
-AutoFDXT 56 I/O General purpose I/O (open drain, with internal pull-up) or
automatic line feed (open drain input with internal pull-up).
When this signal is low the printer should automatically line
feed after each line is printed.
BIDEN 1 I Bi-Direction Enable - PD7-PD0 direction select. A logic 0
sets the parallel port for I/O Select Register Control. A logic
1 sets the parallel port for Control Register Bit-5 Control.
BUSY 66 I Busy (with internal pull-up) - General purpose input or line
printer busy (active high). can be used as an output from the
printer to indicate printer is not ready to accept data.
CLK 4 I Clock Input. - An external clock must be connected to this
pin to clock the baud rate generator and internal circuitry
(see Programmable Baud Rate Generator). This input is not
5V tolerant.
-CSA 32 I Chip Select A - A logic 0 at this pin enables the serial
channel-A UART registers for CPU data transfers.
-CSB 3 I Chip Select B - A logic 0 at this pin enables the serial
channel-B UART registers for CPU data transfers.
-CSP 38 I Printer Port Chip Select - (active low). A logic 0 at this pin
enables the parallel printer port registers and/or PD7-PD0
for external CPU data transfers.
D0-D7 14-21 I/O Data Bus (Bi-directional) - These pins are the eight bit, three
state data bus for transferring information to or from the
controlling CPU. D0 is the least significant bit and the first
data bit in a transmit or receive serial data stream.

ST16C552ACJ68TR-F

Mfr. #:
Manufacturer:
MaxLinear
Description:
UART Interface IC DUAL UART W/16BYTE FIFO&PARALELPRNTPORT
Lifecycle:
New from this manufacturer.
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