OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

ST16C552ACJ68TR-F

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39
4
ST16C552/552A
Rev. 3.40
SYMBOL DESCRIPTION
Symbol Pin Signal Type Pin Description
-ERROR 63 I Error, Printer (with internal pull-up) - General purpose input
or line printer error. This pin may be connected to the active
low (logic 0) output of a printer to indicate an error condition.
GND 2,7,54 Pwr Signal and Power Ground.
27
INIT 57 I/O Initialize (open drain, with internal pull-up) - General pur-
pose I/O signal. This pin may be connected for initialization
service of a connected line printer. Generally when this
signal is a logic 0, any connected printer will be initialized.
INT A/B 45,60 O Interrupt output A/B ( three state active high) - These pins
provide individual channel interrupts, INT A-B. INT A-B are
enabled when MCR bit-3 is set to a logic 1, interrupts are
enabled in the interrupt enable register (IER), and when an
interrupt condition exists. Interrupt conditions include: re-
ceiver errors, available receiver buffer data, transmit buffer
empty, or when a modem status flag is detected.
-INTP 59 O Printer Interrupt, - This pin can be used to signal the
interrupt status of a connected printer. This pin basically
tracks the -ACK input pin, When INTSEL is a logic 0 and
interrupts are enabled by bit-4 in the control register. A
latched mode can be selected by setting INTSEL to a logic
1. In this case the interrupt -INTP is generated normally but
does not return to the inactive state until the trailing edge of
the read cycle (-IOR pin). -INTP is three stated until CON
bit-4 is set to a logic 1. The difference between the
ST16C552 and ST16C552A is the output state of INTP.
INTP is active high (logic 1) on the ST16C552 whereas
INTP is active low (logic 0) on the ST16C552A part when the
interrupt latch mode is selected.
INTSEL 43 I Interrupt Select mode - This pin selects the interrupt type for
the printer port (-INTP). When this pin is a logic 0, the
external -ACK signal state is generally followed, minus
some minor propagation delay. Making this pin a logic 1 or
connecting it to VCC will set the interrupt latched mode. In this
case the printer interrupt (-INTP) will not return to a logic 0 on
the 552 or a logic 1 on the 552A (552A is inverted), until the
5
ST16C552/552A
Rev. 3.40
SYMBOL DESCRIPTION
Symbol Pin Signal Type Pin Description
trailing edge of -IOR (end of the external CPU read cycle).
-IOR 37 I Read strobe.- A logic 0 transition on this pin will place the
contents of an Internal register defined by address bits A0-
A2 for either UART channels A/B or A0-A1 for the printer
port, onto D0-D7 data bus for a read cycle by an external
CPU.
-IOW 36 I Write strobe.- A logic 0 transition on this pin will transfer the
data on the internal data bus (D0-D7), as defined by either
address bits A0-A2 for UART channels A/B or A0-A1 for the
printer port, into an internal register during a write cycle from
an external CPU.
PD7-PD0 46-53 I/O Printer Data port (Bi-directional three state) - These pins are
the eight bit, three state data bus for transferring information
to or from an external device (usually a printer). D0 is the
least significant bit. PD7-PD0 are latched during a write
cycle (output mode).
PE 67 I Paper Empty - General purpose input or line printer paper
empty (Internal pull-up). This pin can be connected to
provide a printer out of paper indication.
RDOUT 44 O Read Out (active high) - This pin goes to a logic 1 when the
external CPU is reading data from the 552/552A. This signal
can be used to enable/disable external transceivers or other
logic functions.
-RESET 39 I Master Reset (active low) - a logic 0 on this pin will reset the
internal registers and all the outputs. The UART transmitter
output and the receiver input will be disabled during reset
time. (See ST16C552/552A External Reset Conditions for
initialization details.)
-RXRDY A/B 9,61 O Receive Ready A/B (active low). This function is associated
with the dual channel UARTs and provide the RX FIFO/
RHR status for individual receive channels (A-B). A logic 0
indicates there is receive data to read/unload, i.e., receive
ready status with one or more RX characters available in the
FIFO/RHR. This pin is a logic 1 when the FIFO/RHR is
empty or when the programmed trigger level has not been
6
ST16C552/552A
Rev. 3.40
Symbol Pin Signal Type Pin Description
reached.
SLCT 65 I Select (with internal pull-up) - General purpose input or line
printer select status. Normally this pin is connected to a
printer output (active low) that indicates the ready status of
a printer, i.e., on-line and/or on-line and ready.
-SLCTIN 58 I/O Select In (open drain, with internal pull-up) - General
purpose I/O or line printer select. This pin can be read via
Bit-3 in the printer command register, or written via bit-3 in
the printer control register. As this pin is open-drain, it can
be wire-or’d with other outputs. Normally this signal is
connected with a printer to select the printer with an active
low.
-STROBE 55 I/O Strobe (open drain, with internal pull-up) - General purpose
I/O or data strobe output. Normally this output is connected
to a printer and indicates that valid data is available at the
printer port (PD0-PD7).
-TXRDY A/B 22,42 O Transmit Ready A/B (active low). These outputs provide the
TX FIFO/THR status for individual transmit channels (A-B).
As such, an individual channel’s -TXRDY A-B buffer ready
status is indicated by logic 0, i.e., at least one location is
empty and available in the FIFO or THR. This pin goes to
a logic 1 when there are no more empty locations in the
FIFO or THR.
VCC 23,40,64 Pwr 2.97 to 5.5V power supply input. All inputs are 5V tolerant
except for XTAL1 and all printer port inputs for devices with
revision "F" and newer.
-CD A/B 29,8 I Carrier Detect (active low) - These inputs are associated
with individual UART channels A through B. A logic 0 on this
pin indicates that a carrier has been detected by the modem
for that channel.
-CTS A/B 28,13 I Clear to Send (active low) - These inputs are associated with
individual UART channels, A through B. A logic 0 on this pin(s)
indicates the modem or data set is ready to accept transmit
data from the 552/552A for the given channel. Status can be
tested by reading MSR bit-4 for that channel(s). -CTS has no
SYMBOL DESCRIPTION
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39

ST16C552ACJ68TR-F

Mfr. #:
Buy ST16C552ACJ68TR-F
Manufacturer:
MaxLinear
Description:
UART Interface IC DUAL UART W/16BYTE FIFO&PARALELPRNTPORT
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet