REVISION A 3/24/15
ICS8344 DATA SHEET
7 LOW SKEW, 1-TO-24
DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER
TABLE 5B. AC CHARACTERISTICS, V
DD
= 3.3V±5%, V
DDO
= 2.5V±5%, TA = 0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 167 MHz
tp
LH
Propagation Delay
Low-to-High; NOTE 1
f ≤ 167MHz 2.6 4.5 ns
tp
HL
Propagation Delay
High-to-Low; NOTE 1
f ≤ 167MHz 2.6 4.2 ns
tsk(b) Bank Skew; NOTE 2, 6
Measured on the
rising edge of V
DDO
/2
150 ps
tsk(o) Output Skew; NOTE 3, 6
Measured on the
rising edge of V
DDO
/2
275 ps
tsk(pp) Part-to-Part Skew; NOTE 4, 6
Measured on the
rising edge of V
DDO
/2
600 ps
t
R
Output Rise Time; NOTE 5 30% to 70% 300 1700 ps
t
F
Output Fall Time; NOTE 5 30% to 70% 300 1400 ps
t
PW
Output Pulse Width
f ≤ 167MHz tPeriod/2 - 0.65 tPeriod/2 tPeriod/2 + 0.65 ns
f = 167MHz 2.35 3.65 ns
t
EN
Output Enable Time; NOTE 5 f = 66.7MHz 6 ns
t
DIS
Output Disable TIme; NOTE 5 f = 66.7MHz 6 ns
All parameters measured at 167MHz unless noted otherwise.
NOTE 1: Measured from the differential input crossing point to the output at V
DDO
/2.
NOTE 2: Defi ned as skew within a bank of outputs at the same voltages and with equal load conditions.
NOTE 3: Defi ned as skew between outputs at the same supply voltage and with equal load conditions.
NOTE 4: Defi ned as the skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at V
DDO
/2.
NOTE 5: These parameters are guaranteed by characterization. Not tested in production.
NOTE 6: This parameter is defi ned in accordance with JEDEC Standard 65.
