19
LTC1436A
LTC1436A-PLL/LTC1437A
14367afb
APPLICATIONS INFORMATION
WUU
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The divided down voltage at the negative (–) input to the
comparator is compared to an internal 1.19V reference. A
20mV hysteresis is built in to assure rapid switching. The
output is an open drain MOSFET and requires a pull-up
resistor. This comparator is
not
active in shutdown. The
low side of the resistive divider should connect to SGND.
SFB Pin Operation
When the SFB pin drops below its ground-referenced
1.19V threshold, continuous mode operation is forced. In
continuous mode, the large N-channel main and synchro-
nous switches are used regardless of the load on the main
output.
In addition to providing a logic input to force continuous
synchronous operation, the SFB pin provides a means to
regulate a flyback winding output. Continuous synchro-
nous operation allows power to be drawn from the auxil-
iary windings without regard to the primary output load.
The SFB pin provides a way to force continuous synchro-
nous operation as needed by the flyback winding.
The secondary output voltage is set by the turns ratio of
the transformer in conjunction with a pair of external
resistors returned to the SFB pin as shown in Figure 4a.
The secondary regulated voltage V
SEC
in Figure 4a is
given by:
VNV V
R
R
SEC OUT
+
()
>+
1 1 19 1
6
5
.
where N is the turns ratio of the transformer and V
OUT
is
the main output voltage sensed by V
OSENSE
.
Auxiliary Regulator/Comparator
The auxiliary regulator/comparator can be used as a
comparator or low dropout regulator (by adding an exter-
nal PNP pass device).
When the voltage present at the AUXON pin is greater than
1.19V the regulator/comparator is on. Special circuitry
consumes a small (20µ A) bias current while still remain-
ing stable when operating as a low dropout regulator. No
excess current is drawn when the input stage is overdriven
when used as a comparator.
The AUXDR pin is internally connected to an open drain
MOSFET which can sink up to 10mA. The voltage on
AUXDR determines whether or not an internal 12V resis-
tive divider is connected to AUXFB as described below. A
pull-up resistor is required on AUXDR and the voltage
must not exceed 28V.
With the addition of an external PNP pass device, a linear
regulator capable of supplying up to 0.5A is created. As
shown in Figure 12a, the base of the external PNP con-
nects to the AUXDR pin together with a pull-up resistor.
The output voltage V
OAUX
at the collector of the external
PNP is sensed by the AUXFB pin.
The input voltage to the auxiliary regulator can be taken
from a secondary winding on the primary inductor as
shown in Figure 11a. In this application, the SFB pin
regulates the input voltage to the PNP regulator (see SFB
Pin Operation) and should be set to approximately 1V to
2V above the required output voltage of the auxiliary
regulator. A Zener diode clamp may be required to keep
V
SEC
under the 28V AUXDR pin specification when the
primary is heavily loaded and the secondary is not.
The AUXFB pin is the feedback point of the regulator. An
internal resistive divider is available to provide a 12V
output by simply connecting AUXFB directly to the collec-
tor of the external PNP. The internal resistive divider is
selected when the voltage at AUXFB goes above 9.5V with
1V built-in hysteresis. For other output voltages, an exter-
nal resistive divider is fed back to AUXFB as shown in
Figure 11b. The output voltage V
OAUX
is set as follows:
V
OAUX
= 1.19V(1+R8/R7) < 8V AUXDR < 8.5V
V
OAUX
= 12V AUXDR > 12V
The circuit can also be used as a noninverting voltage
comparator as shown in Figure 11c. When AUXFB drops
below 1.19V, the AUXDR pin will be pulled low. A mini-
mum current of 5µA is required to pull the AUXDR pin to
5V when used as a comparator output, in order to coun-
teract a 1.5µA internal current source.
20
LTC1436A
LTC1436-PLL-A/LTC1437A
14367afb
APPLICATIONS INFORMATION
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Figure 11a. 12V Output Auxiliary Regulator Using
Internal Feedback Resistors
The minimum on-time for the LTC1436A/LTC1437A in a
properly configured application is less than 300ns but
increases at low ripple current amplitudes (see Figure 12).
If an application is expected to operate close to the
minimum on-time limit, an inductor value must be chosen
that is low enough to provide sufficient ripple amplitude to
meet the minimum on-time requirement. To determine the
proper value, use the following procedure:
1. Calculate on-time at maximum supply, t
ON(MIN)
=
(1/f)(V
OUT
/V
IN(MAX)
).
2. Use Figure 12 to obtain the peak-to-peak inductor ripple
current as a percentage of I
MAX
necessary to achieve
the calculated t
ON(MIN)
.
3. Ripple amplitude I
L(MIN)
= (% from Figure 12) (I
MAX
)
where I
MAX
= 0.1/R
SENSE
.
4. L
MAX
=
t
VV
I
ON MIN
IN MAX OUT
L MIN
()
()
()
Choose an inductor less than or equal to the calculated
L
MAX
to ensure proper operation.
1436 F11a
V
SEC
= 1.19V 1 + > 13V
R6
R5
()
ON/OFF
V
SEC
SECONDARY WINDING
R6
R5
10µF
1:N
V
OAUX
12V
AUXDR
LTC1436A
LTC1437A
AUXFB
AUXON
+
SFB
+
Figure 11c. Auxiliary Comparator Configuration
+
AUXON
AUXFB
ON/OFF
INPUT
V
PULL-UP < 8.5V
AUXDR
OUTPUT
1436 F11c
1.19V REFERENCE
LTC1436A
LTC1437A
Figure 11b. 5V Output Auxiliary Regulator Using
External Feedback Resistors
ON/OFF
V
SEC
SECONDARY WINDING
R6
R5
R8
R7
1436 F11b
10µF
1:N
V
OAUX
AUXDR
LTC1436A
LTC1437A
AUXFB
AUXON
V
SEC
= 1.19V 1 +
R6
R5
()
V
OAUX
= 1.19V 1 +
R8
R7
()
+
SFB
+
Minimum On-Time Considerations
Minimum on-time, t
ON(MIN)
, is the smallest amount of
time that the LTC1436A/LTC1437A are capable of turning
the top MOSFET on and off again. It is determined by
internal timing delays and the gate charge required to turn
on the top MOSFET. Low duty cycle applications may
approach this minimum on-time limit. If the duty cycle
falls below what can be accommodated by the minimum
on-time, the LTC1436A/LTC1437A will begin to skip cycles.
The output voltage will continue to be regulated, but the
ripple current and ripple voltage will increase. Therefore
this limit should be avoided.
Figure 12. Minimum On-Time vs Inductor Ripple Current
Because of the sensitivity of the LTC1436A/LTC1437A
current comparator when operating close to the minimum
on-time limit, it is important to prevent stray magnetic flux
generated by the inductor from inducing noise on the
current sense resistor, which may occur when axial type
cores are used. By orienting the sense resistor on the
radial axis of the inductor (see Figure 13), this noise will be
minimized.
INDUCTOR RIPPLE CURRENT (% OF I
MAX
)
0
200
MINIMUM ON-TIME (ns)
250
300
350
400
RECOMMENDED
REGION FOR MIN
ON-TIME AND
MAX EFFICIENCY
10 20 30 40
1435A F12
50 60 70
21
LTC1436A
LTC1436A-PLL/LTC1437A
14367afb
APPLICATIONS INFORMATION
WUU
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Efficiency. For example, in a 20V to 5V application,
10mA of INTV
CC
current results in approximately 3mA
of V
IN
current. This reduces the midcurrent loss from
10% or more (if the driver was powered directly from
V
IN
) to only a few percent.
3. I
2
R losses are predicted from the DC resistances of the
MOSFET, inductor and current shunt. In continuous
mode the average output current flows through L and
R
SENSE
, but is “chopped” between the topside main
MOSFET and the synchronous MOSFET. If the two
MOSFETs have approximately the same R
DS(ON)
, then
the resistance of one MOSFET can simply be summed
with the resistances of L and R
SENSE
to obtain I
2
R
losses. For example, if each R
DS(ON)
= 0.05,
R
L
= 0.15 and R
SENSE
= 0.05, then the total resis-
tance is 0.25. This results in losses ranging from 3%
to 10% as the output current increases from 0.5A to 2A.
I
2
R losses cause the efficiency to drop at high output
currents.
4. Transition losses apply only to the topside MOSFET(s),
and only when operating at high input voltages (typi-
cally 20V or greater). Transition losses can be esti-
mated from:
Transition Loss = 2.5(V
IN
)
1.85
(I
MAX
)(C
RSS
)(f)
Other losses including C
IN
and C
OUT
ESR dissipative
losses, Schottky conduction losses during dead-time and
inductor core losses, generally account for less than 2%
total additional loss.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in DC (resistive) load
current. When a load step occurs, V
OUT
immediately shifts
by an amount equal to (I
LOAD
)(ESR), where ESR is the
effective series resistance of C
OUT
. I
LOAD
also begins to
charge or discharge C
OUT
which generates a feedback
error signal. The regulator loop then acts to return V
OUT
to
its steady-state value. During this recovery time V
OUT
can
be monitored for overshoot or ringing, which would
indicate a stability problem. The I
TH
external components
shown in the Figure 1 circuit will provide adequate com-
pensation for most applications.
L
INDUCTOR
1435A F08
Figure 13. Allowable Inductor/R
SENSE
Layout Orientations
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1436A/LTC1437A circuits: LTC1436A/
LTC1437A V
IN
current, INTV
CC
current, I
2
R losses and
topside MOSFET transition losses.
1. The V
IN
current is the DC supply current given in the
Electrical Characteristics table which excludes MOSFET
driver and control currents. V
IN
current results in a
small (<1%) loss which increases with V
IN
.
2. INTV
CC
current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from INTV
CC
to ground. The resulting dQ/dt is a current
out of INTV
CC
that is typically much larger than the
control circuit current. In continuous mode, I
GATECHG
=
f(Q
T
+ Q
B
), where Q
T
and Q
B
are the gate charges of the
topside and bottom side MOSFETs. It is for this reason
that the Adaptive Power output stage switches to a low
Q
T
MOSFET during low current operation.
By powering EXTV
CC
from an output-derived source,
the additional V
IN
current resulting from the driver and
control currents will be scaled by a factor of Duty Cycle/

LTC1436ACGN-PLL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
IC REG CTRLR BUCK 24SSOP
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