STMPE321QTR Datasheet STMPE321QTR | P22-P24

GPIO controller STMPE321

22/40 Doc ID 15791 Rev 3

7 GPIO controller

A total of 3 GPIOs are available in the STMPE321. The GPIO controller contains the

registers that allow the host system to configure each of the pins into either a GPIO or Touch

input. Unused GPIOs should be configured as outputs to minimize power consumption.

A group of registers is used to control the exact function of each of the 3 GPIOs. The

registers and their respective addresses are listed in Table 8.

All GPIO registers are named GPxx, where:

Xxx represents the functional group

For LSB registers:

For MSB registers:

Table 8. GPIO controller registers summary map

Address Register name Description Auto-increment

0x10 GPIO_MR_LSB

GPIO monitor pin state

Ye s

0x11 GPIO_MR_MSB

0x12 GPIO_SET_LSB

GPIO set pin state

Ye s

0x13 GPIO_SET_MSB

0x14 GPIO_DIR_LSB

GPIO set pin direction

Ye s

0x15 GPIO_DIR_MSB

0x16 GPIO_FUNCT_LSB

GPIO function register Yes

0x17 GPIO_FUNCT_MSB

76543 2 1 0

RESERVED IO-2 IO-1 IO-0

76543 2 1 0

RESERVED

STMPE321 GPIO controller

Doc ID 15791 Rev 3 23/40

The function of each bit is shown inTa bl e 9 :

Table 9. GPIO control bits function

GPIO monitor pin state

Reading this bit yields the current state of the bit. Writing has no

effect.

GPIO set pin state

Writing '1' to this bit causes the corresponding GPIO to go to '1' state

Writing '0' to this bit causes the corresponding GPIO to go to '0' state

GPIO set pin direction

'0' sets the corresponding GPIO to input state, and '1' sets it to output

state. All bits are '0' on reset.

GPIO function

'1' sets the corresponding GPIO to function as GPIO, and '0' sets it to

touchkey mode.

Capacitive touch module registers STMPE321

24/40 Doc ID 15791 Rev 3

8 Capacitive touch module registers

TOUCH_FIFO Touch FIFO

Address: 0x19, 0x18

Type: R

Reset: 0x00

Description: TOUCH_FIFO is the access port for the internal 4-level FIFO used for buffering the

touch events. While it is possible to access each byte in the data structure directly, it is

recommended that the FIFO is accessed only via the 0x18 address.

The FIFO must be accessed in multiples of 2 bytes (LSB, MSB). For the STMPE321,

MSB is reserved and LSB contains a snapshot of the recent touch event.

Where Tn is touch status of touch sensing channel n.

Table 10. TOUCH_FIFO summary table

Address Function

0x18

FIFO-0, LSB

0x19

FIFO-0, MSB

0x1A

FIFO-1, LSB

0x1B

FIFO-1, MSB

0x1C

FIFO-2, LSB

0x1D

FIFO-2, MSB

0x1E

FIFO-3, LSB

0x1F

FIFO-3, MSB

76543 2 1 0

T7 T6 T5 T4 T3 T2 T1 T0

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STMPE321QTR

Mfr. #:

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IC CTLR TOUCH KEY 3CH 12-QFN

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STMPE321QTR