13
Date: 1/21/05 SP6120 Low Voltage, AnyFET
TM
, Synchronous, Buck Controller © Copyright 2005 Sipex Corporation
switch. It is during this interval that the 3%
window comparator has taken control away from
the main loop. The main loop regains control
only if the output voltage crosses through its
regulated value. Also notice where the 3%
comparator takes over. The output voltage is
considered “high” only if the trough of the ripple
is above 3%. The output voltage is considered
“low” only if the peak of the ripple is below 3%.
By managing the secondary loop in this fashion,
the SP6120 can improve the transient response
of high performance power converters without
causing strange disturbances in low to moderate
performance systems.
Driver Logic
Signals from the PWM latch (QPWM), Fault
latch (FAULT), Program Logic, Zero Crossing
Comparator, and 3% Window Comparators all
flow into the Driver Logic. The following is a
truth table for determining the state of the GH
and GL voltages for given inputs:
ELBATHTURTCIGOLREVIRD
TLUAF1100000000
roMWPQ
PMOC%3
XX11000000
TEFP/TEFNNPNPNPNPNP
CSID/TNOCXXXXCCDDDD
SSORCOREZXXXXXX00 11
HG0110010 10 1
LG0000111100
The QPWM and 3% Comparators are grouped
together because 3% Low is the same as QPWM
= 1 and 3% High is the same as QPWM = 0.
Output Drivers
The driver stage consists of one high side, 4
driver, GH and one low side, 4, NFET driver,
GL. As previously stated, the high side driver
can be configured to drive a PFET or an NFET
high side switch. The high side driver can also be
configured as a switch node referenced driver.
Due to voltage constraints, this mode is manda-
tory for 5V, single supply, high side NFET
applications. The following figure shows typical
driver waveforms for the 5V, high side NFET
design.
As with all synchronous designs, care must be
taken to ensure that the MOSFETs are properly
chosen for non-overlap time, peak current capa-
bility and efficiency.
GATE DRIVER TEST CONDITONS
5V
90%
10%
GH (GL)
2V
5V
GH (GL)
2V
NON-OVERLAP
RISE TIME
FALL TIME
90%
10%
V(BST)
0V
GH
Voltage
V(V
CC
)
0V
GL
Voltage
V(V
CC
= V
IN
)
SWN
Voltage
~0V
~V(Diode) V
~2V(V
IN
)
BST
Voltage
~V(V
IN
)
TIME
THEORY OF OPERATIONS: Continued
14
Date: 1/21/05 SP6120 Low Voltage, AnyFET
TM
, Synchronous, Buck Controller © Copyright 2005 Sipex Corporation
Inductor Selection
There are many factors to consider in selecting
the inductor including cost, efficiency, size and
EMI. In a typical SP6120 circuit, the inductor is
chosen primarily for value, saturation current
and DC resistance. Increasing the inductor value
will decrease output voltage ripple, but degrade
transient response. Low inductor values pro-
vide the smallest size, but cause large ripple
currents, poor efficiency and more output ca-
pacitance to smooth out the larger ripple cur-
rent. The inductor must also be able to handle
the peak current at the switching frequency
without saturating, and the copper resistance in
the winding should be kept as low as possible to
minimize resistive power loss. A good compro-
mise between size, loss and cost is to set the
inductor ripple current to be within 20% to 40%
of the maximum output current.
The switching frequency and the inductor oper-
ating point determine the inductor value as
follows:
(max)(max )
(max)
)(
OUTrSIN
OUTINOUT
IKFV
VVV
L
=
where:
F
S
= switching frequency
K
r
= ratio of the ac inductor ripple current to
the maximum output current
The peak to peak inductor ripple current is:
LFV
VVV
I
SIN
OUTINOUT
PP
(max)
(max)
)(
=
Once the required inductor value is selected, the
proper selection of core material is based on
peak inductor current and efficiency require-
ments.
The core material must be large enough not to
saturate at the peak inductor current
2
(max)
PP
OUTPEAK
I
II +=
and provide low core loss at the high switching
frequency. Low cost powdered iron cores have
a gradual saturation characteristic but can intro-
duce considerable ac core loss, especially when
the inductor value is relatively low and the
ripple current is high. Ferrite materials, on the
other hand, are more expensive and have an
abrupt saturation characteristic with the induc-
tance dropping sharply when the peak design
current is exceeded. Nevertheless, they are pre-
ferred at high switching frequencies because
they present very low core loss and the design
only needs to prevent saturation. In general,
ferrite or molypermalloy materials are better
choice for all but the most cost sensitive appli-
cations.
The power dissipated in the inductor is equal to
the sum of the core and copper losses. To mini-
mize copper losses, the winding resistance needs
to be minimized, but this usually comes at the
expense of a larger inductor. Core losses have a
more significant contribution at low output cur-
rent where the copper losses are at a minimum,
and can typically be neglected at higher output
currents where the copper losses dominate. Core
loss information is usually available from the
magnetic vendor.
The copper loss in the inductor can be calculated
using the following equation:
WINDINGRMSLCuL
RIP
2
)()(
=
where I
L(RMS)
is the RMS inductor current that
can be calculated as follows:
I
L(RMS)
= I
OUT(max)
1 +
1
(
I
PP
)
2
3 I
OUT(max)
Output Capacitor Selection
The required ESR (Equivalent Series Resis-
tance) and capacitance drive the selection of the
type and quantity of the output capacitors. The
ESR must be small enough that both the resis-
tive voltage deviation due to a step change in the
load current and the output ripple voltage do not
exceed the tolerance limits expected on the
output voltage. During an output load transient,
the output capacitor must supply all the addi-
tional current demanded by the load until the
APPLICATIONS INFORMATION
15
Date: 1/21/05 SP6120 Low Voltage, AnyFET
TM
, Synchronous, Buck Controller © Copyright 2005 Sipex Corporation
Kemet T510 surface mount capacitors are popu-
lar tantalum capacitors that work well in SP6120
applications. POSCAP from Sanyo is a solid
electrolytic chip capacitor that has low ESR and
high capacitance. For the same ESR value,
POSCAP has lower profile compared with tan-
talum capacitor.
Input Capacitor Selection
The input capacitor should be selected for ripple
current rating, capacitance and voltage rating.
The input capacitor must meet the ripple current
requirement imposed by the switching current.
In continuous conduction mode, the source cur-
rent of the high-side MOSFET is approximately
a square wave of duty cycle V
OUT
/V
IN
. Most of
this current is supplied by the input bypass
capacitors. The RMS value of input capacitor
current is determined at the maximum output
current and under the assumption that the peak
to peak inductor ripple current is low, it is given
by:
I
CIN(rms)
= I
OUT(max)
D(1 - D)
The worse case occurs when the duty cycle D is
50% and gives an RMS current value equal to
I
OUT
/2. Select input capacitors with adequate
ripple current rating to ensure reliable opera-
tion.
The power dissipated in the input capacitor is:
)(
2
)( CINESRrmsCINCIN
RIP =
This can become a significant part of power
losses in a converter and hurt the overall energy
transfer efficiency.
The input voltage ripple primarily depends on
the input capacitor ESR and capacitance. Ignor-
ing the inductor ripple current, the input voltage
ripple can be determined by:
2
)(
)((max)
)(
ININS
OUTINOUTMAXOUT
CINESRoutIN
VCF
VVVI
RIV
+=
The capacitor type suitable for the output ca-
pacitors can also be used for the input capaci-
tors. However, exercise extra caution when tanta-
SP6120 adjusts the inductor current to the new
value. Therefore the capacitance must be large
enough so that the output voltage is held up
while the inductor current ramps up or down to
the value corresponding to the new load current.
Additionally, the ESR in the output capacitor
causes a step in the output voltage equal to the
ESR value multiplied by the change in load
current. Because of the fast transient response
and inherent 100% and 0% duty cycle capabil-
ity provided by the SP6120 when exposed to
output load transient, the output capacitor is
typically chosen for ESR, not for capacitance
value.
The output capacitor’s ESR, combined with the
inductor ripple current, is typically the main
contributor to output voltage ripple. The maxi-
mum allowable ESR required to maintain a
specified output voltage ripple can be calculated
by:
PP
OUT
ESR
I
V
R
where:
V
OUT
= peak to peak output voltage ripple
I
PP
= peak to peak inductor ripple current
The total output ripple is a combination of the
ESR and the output capacitance value and can
be calculated as follows:
V
OUT
=
(
I
PP
(1 – D)
)
2
+ (I
PP
R
ESR
)
2
C
OUT
F
S
where:
F
S
= switching frequency
D = duty cycle
C
OUT
= output capacitance value
Recommended capacitors that can be used ef-
fectively in SP6120 applications are: low-ESR
aluminum electrolytic capacitors, OS-CON ca-
pacitors that provide a very high performance/
size ratio for electrolytic capacitors and low-
ESR tantalum capacitors. AVX TPS series and
APPLICATIONS INFORMATION: Continued

SP6120EY-L/TR

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Switching Controllers Low Voltage, AnyFET Synchronous, Cntrllr
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