16
Date: 1/21/05 SP6120 Low Voltage, AnyFET
TM
, Synchronous, Buck Controller © Copyright 2005 Sipex Corporation
lum capacitors are considered. Tantalum capaci-
tors are known for catastrophic failure when ex-
posed to surge current, and input capacitors are
prone to such surge current when power supplies
are connected ‘live’ to low impedance power
sources. Certain tantalum capacitors, such as AVX
TPS series, are surge tested. For generic tantalum
capacitors, use 2:1 voltage derating to protect the
input capacitors from surge fall-out.
MOSFET Selection
The losses associated with MOSFETs can be
divided into conduction and switching losses.
Conduction losses are related to the on resistance
of MOSFETs, and increase with the load current.
Switching losses occur on each on/off transition
when the MOSFETs experience both high current
and voltage. Since the bottom MOSFET switches
current from/to a paralleled diode (either its own
body diode or a Schottky diode), the voltage across
the MOSFET is no more than 1V during switching
transition. As a result, its switching losses are
negligible. The switching losses are difficult to
quantify due to all the variables affecting turn on/
off time. However, the following equation pro-
vides an approximation on the switching losses
associated with the top MOSFET driven by SP6120.
SOUTINrssSH
FIVCP
(max)(max)(max)
12=
where
C
rss
= reverse transfer capacitance of the top
MOSFET
Switching losses need to be taken into account for
high switching frequency, since they are directly
proportional to switching frequency. The conduc-
tion losses associated with top and bottom
MOSFETs are determined by:
DIRP
OUTONDSCH
2
(max))((max)
=
)1(
2
(max ))((max)
DIRP
OUTONDSCL
−=
where
P
CH(max)
= conduction losses of the high side
MOSFET
P
CL(max)
= conduction losses of the low side
MOSFET
R
DS(ON)
= drain to source on resistance.
The total power losses of the top MOSFET are the
sum of switching and conduction losses. For syn-
chronous buck converters of efficiency over 90%,
allow no more than 4% power losses for high or
low side MOSFETs. For input voltages of 3.3V
and 5V, conduction losses often dominate switch-
ing losses. Therefore, lowering the R
DS(ON)
of the
MOSFETs always improves efficiency even
though it gives rise to higher switching losses due
to increased C
rss
.
Top and bottom MOSFETs experience unequal
conduction losses if their on time is unequal. For
applications running at large or small duty cycle, it
makes sense to use different top and bottom
MOSFETs. Alternatively, parallel multiple
MOSFETs to conduct large duty factor.
R
DS(ON)
varies greatly with the gate driver voltage.
The MOSFET vendors often specify R
DS(ON)
on
multiple gate to source voltages (V
GS
), as well as
provide typical curve of R
DS(ON)
versus V
GS
. For
5V input, use the R
DS(ON)
specified at 4.5V V
GS
. At
the time of this publication, vendors, such as
Fairchild, Siliconix and International Rectifier,
have started to specify R
DS(ON)
at V
GS
less than 3V.
This has provided necessary data for designs in
which these MOSFETs are driven with 3.3V and
made it possible to use SP6120 in 3.3V only
applications.
Thermal calculation must be conducted to ensure
the MOSFET can handle the maximum load cur-
rent. The junction temperature of the MOSFET,
determined as follows, must stay below the maxi-
mum rating.
JA
MOSFET
AJ
R
P
TT
θ
(max)
(max)(max)
+=
where
T
A(max)
= maximum ambient temperature
PMOSFET(max) = maximum power dissipa-
tion of the MOSFET
R
Θ
JA
= junction to ambient thermal resistance.
R
Θ
JA
of the device depends greatly on the board
layout, as well as device package. Significant
APPLICATIONS INFORMATION: Continued
