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RMLV0816BGSB-4S2#AA0

P1-P3P4-P6P7-P9P10-P12P13-P14
RMLV0816BGSB - 4S2
R10DS0231EJ0200 Rev.2.00 Page 4 of
12
2015.06.26
Absolute Maximum Ratings
Parameter Symbol Value unit
Power supply voltage relative to V
SS
V
CC
-0.5 to +4.6 V
Terminal voltage on any pin relative to V
SS
V
T
-0.5
*2
to V
CC
+0.3
*3
V
Power dissipation P
T
0.7 W
Operation temperature Topr -40 to +85 °C
Storage temperature range Tstg -65 to +150 °C
Storage temperature range under bias Tbias -40 to +85 °C
Note 2. -3.0V for pulse ≤ 30ns (full width at half maximum)
3. Maximum voltage is +4.6V.
DC Operating Conditions
Parameter Symbol Min. Typ. Max. Unit Test conditions Note
Supply voltage V
CC
2.4 3.0 3.6 V
V
SS
0 0 0 V
Input high voltage V
IH
2.0 ─ V
CC
+0.2 V Vcc=2.4V to 2.7V
2.2 ─ V
CC
+0.2 V Vcc=2.7V to 3.6V
Input low voltage V
IL
-0.2 ─ 0.4 V Vcc=2.4V to 2.7V 4
-0.2 ─ 0.6 V Vcc=2.7V to 3.6V 4
Ambient temperature range Ta -40 ─ +85 °C
Note 4. -3.0V for pulse ≤ 30ns (full width at half maximum)
DC Characteristics
Parameter Symbol Min. Typ. Max. Unit Test conditions
Input leakage current | I
LI
| ─ ─ 1 A Vin = V
SS
to V
CC
Output leakage current
| I
LO
| ─ ─ 1 A
CS# = V
IH
or OE# = V
IH
or WE# = V
IL
or LB# = UB# = V
IH
, V
I/O
= V
SS
to V
CC
Average operating current
I
CC1
─ 20
*5
25 mA
Cycle = 55ns, duty =100%, I
I/O
= 0mA,
CS# = V
IL
, Others = V
IH
/V
IL
─ 25
*5
30 mA
Cycle = 45ns, duty =100%, I
I/O
= 0mA,
CS# = V
IL
, Others = V
IH
/V
IL
I
CC2
─ 1.5
*5
3 mA
Cycle =1s, duty =100%, I
I/O
= 0mA
CS# ≤ 0.2V, V
IH
≥ V
CC
-0.2V, V
IL
≤ 0.2V
Standby current I
SB
─ ─ 0.3 mA CS# = V
IH
, Others = V
SS
to V
CC
Standby current
I
SB1
─ 0.45
*5
2 A ~+25°C
Vin = V
SS
to V
CC
,
(1) CS# ≥ V
CC
-0.2V or
(2) LB# = UB# ≥ V
CC
-0.2V,
CS# ≤ 0.2V
─ 0.6
*6
4 A ~+40°C
─ ─ 7 A ~+70°C
─ ─ 10 A ~+85°C
Output high voltage
V
OH
2.4 ─ ─ V
I
OH
= -1mA
Vcc≥2.7V
V
OH2
2.0 ─ ─ V I
OH
= -0.1mA
Output low voltage
V
OL
─ ─ 0.4 V
I
OL
= 2mA
Vcc≥2.7V
V
OL2
─ ─ 0.4 V I
OL
= 0.1mA
Note 5. Typical parameter indicates the value for the center of distribution at 3.0V (Ta=25ºC), and not 100% tested.
Note 6. Typical parameter indicates the value for the center of distribution at 3.0V (Ta=40ºC), and not 100% tested.
RMLV0816BGSB - 4S2
R10DS0231EJ0200 Rev.2.00 Page 5 of
12
2015.06.26
Capacitance
(Ta =25°C, f =1MHz)
Parameter Symbol Min. Typ. Max. Unit Test conditions Note
Input capacitance C in ─ ─ 8 pF Vin =0V 7
Input / output capacitance C
I/O
─ ─ 10 pF V
I/O
=0V 7
Note 7. This parameter is sampled and not 100% tested.
AC Characteristics
Test Conditions (Vcc = 2.4V ~ 3.6V, Ta = -40 ~ +85°C)
Input pulse levels:
V
IL
= 0.4V, V
IH
= 2.4V (Vcc=2.7V to 3.6V)
V
IL
= 0.4V, V
IH
= 2.2V (Vcc=2.4V to 2.7V)
Input rise and fall time: 5ns
Input and output timing reference level: 1.4V
Output load: See figures (Including scope and jig)
Read Cycle
Parameter Symbol
Vcc=2.7V to 3.6V Vcc=2.4V to 2.7V
Unit Note
Min. Max. Min. Max.
Read cycle time t
RC
45 ─ 55 ─ ns
Address access time t
AA
─ 45 ─ 55 ns
Chip select access time t
ACS
─ 45 ─ 55 ns
Output enable to output valid t
OE
─ 22 ─ 30 ns
Output hold from address change t
OH
10 ─ 10 ─ ns
LB#, UB# access time t
BA
─ 45 ─ 55 ns
Chip select to output in low-Z t
CLZ
10 ─ 10 ─ ns 8,9
LB#, UB# enable to low-Z t
BLZ
5 ─ 5 ─ ns 8,9
Output enable to output in low-Z t
OLZ
5 ─ 5 ─ ns 8,9
Chip deselect to output in high-Z t
CHZ
0 18 0 20 ns 8,9,10
LB#, UB# disable to high-Z t
BHZ
0 18 0 20 ns 8,9,10
Output disable to output in high-Z t
OHZ
0 18 0 20 ns 8,9,10
Note 8. This parameter is sampled and not 100% tested.
9. At any given temperature and voltage condition, t
CHZ
max is less than t
CLZ
min, t
BHZ
max is less than t
BLZ
min,
and t
OHZ
max is less than t
OLZ
min, for any device.
10. t
CHZ
, t
BHZ
and t
OHZ
are defined as the time when the DQ pins enter a high-impedance state and are not
referred to the DQ levels.
DQ
1.4V
R
L
= 500 ohm
C
L
= 30 pF
RMLV0816BGSB - 4S2
R10DS0231EJ0200 Rev.2.00 Page 6 of
12
2015.06.26
Write Cycle
Parameter Symbol
Vcc=2.7V to 3.6V Vcc=2.4V to 2.7V
Unit Note
Min. Max. Min. Max.
Write cycle time t
WC
45 ─ 55 ─ ns
Address valid to write end t
AW
35 ─ 50 ─ ns
Chip select to write end t
CW
35 ─ 50 ─ ns
Write pulse width t
WP
35 ─ 40 ─ ns 11
LB#,UB# valid to write end t
BW
35 ─ 50 ─ ns
Address setup time to write start t
AS
0 ─ 0 ─ ns
Write recovery time from write end t
WR
0 ─ 0 ─ ns
Data to write time overlap t
DW
25 ─ 25 ─ ns
Data hold from write end t
DH
0 ─ 0 ─ ns
Output enable from write end t
OW
5 ─ 5 ─ ns 12
Output disable to output in high-Z t
OHZ
0 18 0 20 ns 12,13
Write to output in high-Z t
WHZ
0 18 0 20 ns 12,13
Note 11. t
WP
is the interval between write start and write end.
A write starts when all of (CS#), (WE#) and (one or both of LB# and UB#) become active.
A write is performed during the overlap of a low CS#, a low WE# and a low LB# or a low UB#.
A write ends when any of (CS#), (WE#) or (one or both of LB# and UB#) becomes inactive.
12. This parameter is sampled and not 100% tested.
13. t
OHZ
and t
WHZ
are defined as the time when the DQ pins enter a high-impedance state and are not referred to
the DQ levels.
P1-P3P4-P6P7-P9P10-P12P13-P14

RMLV0816BGSB-4S2#AA0

Mfr. #:
Buy RMLV0816BGSB-4S2#AA0
Manufacturer:
Renesas Electronics
Description:
SRAM 8Mb 3V Adv.SRAM x16 TSOP44, 45ns, WTR
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New from this manufacturer.
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