IDT8T49N366AASGI REVISION A JUNE 28, 2013 21 ©2013 Integrated Device Technology, Inc.
IDT8T49N366I Data Sheet FEMTOCLOCK
®
NG TRIPLE UNIVERSAL FREQUENCY TRANSLATOR
TM
Applications Information
Recommendations for Unused Input and Output Pins
Inputs:
CLKx/nCLKx Inputs
For applications not requiring the use of either differential input, both
CLKnx and nCLKnx can be left floating. Though not required, but for
additional protection, a 1k resistor can be tied from CLKx to ground.
It is recommended that CLKx, nCLKx be left unconnected in
frequency synthesizer mode.
LVCMOS Control Pins
All control pins have internal pullups or pulldowns; additional
resistance is not required but can be added for additional protection.
A 1k resistor can be used.
Outputs:
LVPECL Outputs
All unused LVPECL outputs can be left floating. We recommend that
there is no trace attached. Both sides of the differential output pair
should either be left floating or terminated.
LVDS Outputs
All unused LVDS output pairs can be either left floating or terminated
with 100 across. If they are left floating there should be no trace
attached.
LVCMOS Outputs
All unused LVCMOS output can be left floating. There should be no
trace attached.
Recommended Values for Low-Bandwidth Mode Loop Filter
External loop filter components are not needed in Frequency
Synthesizer or High-Bandwidth modes. In Low-Bandwidth mode, the
loop filter structure and components are recommended, refer to the
Application Schematic. Please consult IDT if other values are
needed.
