IDT8T49N366AASGI REVISION A JUNE 28, 2013 26 ©2013 Integrated Device Technology, Inc.
IDT8T49N366I Data Sheet FEMTOCLOCK
®
NG TRIPLE UNIVERSAL FREQUENCY TRANSLATOR
TM
Schematic Layout
Figure 8 shows an example IDT8T49N366I application schematic.
The schematic example focuses on functional connections and is not
configuration specific. Refer to the pin description and functional
tables in the datasheet to ensure that PLL_BYPASS and CLK_SEL_x
pins are properly set. Input and output terminations shown are
intended as examples only and may not match the exact user
application. To promote readability in this schematic, only Jitter
Attenuator B and the global pins PLL_BYPASS, REF_CLK and
SDATA and SCLK are shown connected. Jitter Attenuators A and C
are recommended to be connected similarly to Jitter Attenuator B;
however different connections may be used as the four jitter
attenuators are fully independent.
As with any high speed analog circuitry, the power supply pins are
vulnerable to random noise. To achieve optimum jitter performance,
power supply isolation is required. The IDT8T49N366I provides
separate V
CC_X
, V
CCA_X
and V
CCO_X
power supplies for each jitter
attenuator to isolate any high switching noise from coupling into the
internal PLLs.
In order to achieve the best possible filtering, it is highly
recommended that the 0.1uF capacitors on the device side of the
ferrite beads be placed on the device side of the PCB as close to the
power pins as possible. This is represented by the placement of
these capacitors in the schematic. If space is limited, the ferrite
beads, 10uf and 0.1uF capacitor connected to 2.5V can be placed on
the opposite side of the PCB. If space permits, place all filter
components on the device side of the board.
Power supply filter recommendations are a general guideline to be
used for reducing external noise from coupling into the devices. The
filter performance is designed for a wide range of noise frequencies.
This low-pass filter starts to attenuate noise at approximately 10kHz.
If a specific frequency noise component is known, such as switching
power supplies frequencies, it is recommended that component
values be adjusted and if required, additional filtering be added.
Additionally, good general design practices for power plane voltage
stability suggests adding bulk capacitance in the local area of all
devices.
