IDT8T49N366AASGI REVISION A JUNE 28, 2013 6 ©2013 Integrated Device Technology, Inc.
IDT8T49N366I Data Sheet FEMTOCLOCK
®
NG TRIPLE UNIVERSAL FREQUENCY TRANSLATOR
TM
Functional Description
The IDT8T49N366I is a three PLL device. The three PLLs are fully
independent and identical. Each PLL can generate desired outputs
frequency (0.98MHz - 1300MHz) from any input source in the
operating range (8kHz - 710MHz). It is capable of synthesizing
frequencies from REFCLK source. The output frequency is
generated regardless of the relationship to the input frequency. Each
PLL of IDT8T49N366I can translate the desired output frequency
from input clock. In this frequency translation mode, a low-bandwidth,
jitter attenuation option is available that makes use of an external
fixed-frequency REFCLK to translate from a noisy input source. If the
input clock is known to be fairly clean or if some modulation on the
input needs to be tracked, then the high-bandwidth frequency
translation mode can be used, without the need for the external clock
source.
The input clock references and REFCLK input are monitored
continuously and appropriate alarm outputs are raised by register
bits and hard-wired pins in the event of any out-of-specification
conditions arising. Clock switching is supported in manual, revertive
& non-revertive modes.
Each PLL of IDT8T49N366I has a factory-programmed configuration
as the default operating state after reset. These defaults may be
over-written by I
2
C register access at any time, but those over-written
settings will be lost on power-down. Please contact IDT if a specific
set of power-up default settings is desired.
The following sections apply individually to each PLL. Signal and
register bit names have a lowercase ‘x’ on the end where ‘x’ should
be ‘A’, ‘B’ or ‘C’ as appropriate for the PLL being controlled.
Operating Modes
Each PLL of IDT8T49N366I has three operating modes which are set
by the MODE_SEL[1:0] bits. There are two frequency translator
modes - low bandwidth and high bandwidth and a frequency
synthesizer mode.
Please make use of IDT-provided configuration applications to
determine the best operating settings for the desired configuration of
the device.
Output Dividers & Supported Output Frequencies
The internal VCO is capable of operating in a range anywhere from
1.995GHz - 2.6GHz. It is necessary to choose an integer multiplier of
the desired output frequency that results in a VCO operating
frequency within that range. The output divider stage N[10:0] is
limited to selection of integers from 2 to 2046. Please refer to Table 3
for the values of N applicable to the desired output frequency.
Table 3. Output Divider Settings & Frequency Ranges
Register
Setting
Frequency
Divider
Minimum
f
OUT
Maximum
f
OUT
Nn[10:0] N (MHz) (MHz)
0000000000x 2 997.5 1300
00000000010 2 997.5 1300
00000000011 3 665 866.7
00000000100 4 498.75 650
00000000101 5 399 520
0000000011x 6 332.5 433.3
0000000100x 8 249.4 325
0000000101x 10 199.5 260
0000000110x 12 166.3 216.7
0000000111x 14 142.5 185.7
0000001000x 16 124.7 162.5
0000001001x 18 110.8 144.4
... Even N 1995 / N 2600 / N
1111111111x 2046 0.98 1.27
