IDT8T49N366AASGI REVISION A JUNE 28, 2013 17 ©2013 Integrated Device Technology, Inc.
IDT8T49N366I Data Sheet FEMTOCLOCK
®
NG TRIPLE UNIVERSAL FREQUENCY TRANSLATOR
TM
AC Electrical Characteristics
Table 7. AC Characteristics, V
CC_X
= V
CCO_X
= 2.5V±5%, V
EE
= 0V, T
A
= -40°C to 85°C*
NOTE: X denotes: A, B or C.
.
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: For RMS phase jitter measurement in Synth and HBW mode, all 4 PLLs are programmed with the same configuration. For the LBW
mode, only the PLL under test is programmed with LBW configuration, the other PLLs are programmed with Synth mode with the same output
frequency. A Rohde & Schwarz SMA-100 Signal generator, 9kHz to 6GHz, is used as the REFCLK source All configurations are with
DBL_REFCLK bit set to 1.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Measurements are collected with the following output frequencies: 66.6667MHz, 125MHz, 156.25MHz, 161.138125MHZ, 400MHz,
622.08MHz, 698.81MHz, 1300MHz.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency 0.98 1300 MHz
f
VCO
VCO Frequency 1995 2600 MHz
tjit(Ø)
RMS Phase Jitter
(Random),
Integer Divide Ratio;
NOTE 1
Synth Mode (Integer FB),
f
OUT
= 400MHz, 40MHz REFCLK,
Integration Range: 12kHz – 20MHz
333 435 fs
Synth Mode (FracN FB),
f
OUT
= 698.81MHz, 40MHz REFCLK,
Integration Range: 12kHz – 20MHz
408 665 fs
HBW Mode,
f
IN
= 133.33MHz, f
OUT
= 400MHz,
Integration Range: 12kHz – 20MHz
338 490 fs
LBW Mode (near integer), 40MHz
REFCLK,
f
IN
= 19.44MHz, f
OUT
= 622.08MHz,
Integration Range: 12kHz – 20MHz
444 680 fs
LBW Mode (FracN), 40MHz REFCLK,
f
IN
= 25MHz, f
OUT
= 161.1328125MHz,
Integration Range: 12kHz – 20MHz
465 680 fs
tjit(cc)
Cycle-to-Cycle Jitter;
NOTE 2, 3
Frequency Synthesizer Mode 35 ps
Frequency Translator Mode 40 ps
t
R
/ t
F
Output
Rise/Fall
Time;
NOTE 3
LVPECL
Outputs
20% to 80% 100 520 ps
LVDS
Outputs
20% to 80% 100 520 ps
odc
Output Duty Cycle;
NOTE 3
f
OUT
< 600MHz 45 55 %
f
OUT
600MHz 40 60 %
