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XR22804IL56-F

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P47
© 2015 Exar Corporation
XR22804
43 / 47 exar.com/XR22804
Rev 1B
EDGE_PULL_DOWN_1 (0x3D4) - Read/Write
EDGE_INTR_MASK_1 (0x3D5) - Read/Write
EDGE_INTR_POS_EDGE_1 (0x3D6) - Read/Write
EDGE_INTR_NEG_EDGE_1 (0x3D7) - Read/Write
Bit Default Description
31:16 0x0000
E[31:16]
0: Disable internal pull-down resistor on IO pin assigned to EDGE function and configured as an input
1: Enable internal pull-down resistor on IO pin assigned to EDGE function and configured as an input
Bit Default Description
31:16 0x0000
E[31:16]
Writing a ’1’ in this register enables an input pin for the corresponding bit position EDGE IO pin(s) configured as
an input to generate an interrupt if either EDGE_INTR_POS_EDGE and / or EDGE _INTR_NEG_EDGE regis-
ters has also been enabled. An EDGE pin configured as an output has no effect.
0: IO pin will not generate an interrupt
1: IO pin assigned to EDGE function and configured as an input will generate an interrupt
Bit Default Description
31:16 0xFFFF
E[31:16]
Writing a ’1’ in this register enables an interrupt to be generated on the rising edge of the corresponding bit posi-
tion EDGE IO pin(s) configured as an input if the EDGE_INTR_MASK register is enabled for that pin. If the
EDGE_INTR_NEG_EDGE register is also enabled, interrupts will be generated on both edges. Writing to an
EDGE pin configured as an output has no effect.
0: IO pin will not generate an interrupt on rising edge
1: IO pin assigned to EDGE function and configured as an input will generate an interrupt on rising edge if cor-
responding EDGE_INTR_MASK bit is set
Bit Default Description
31:16 0xFFFF
E[31:16]
Writing a ’1’ in this register enables an interrupt to be generated on the falling edge of the corresponding bit
position EDGE IO pin(s) configured as an input if the EDGE_INTR_MASK register is enabled for that pin. If the
EDGE_INTR_POS_EDGE register is also enabled, interrupts will be generated on both edges. Writing to an
EDGE pin configured as an output has no effect.
0: IO pin will not generate an interrupt on falling edge
1: IO pin assigned to EDGE function and configured as an input will generate an interrupt on falling edge if cor-
responding EDGE_INTR_MASK bit is set
© 2015 Exar Corporation
XR22804
44 / 47 exar.com/XR22804
Rev 1B
EDGE_PWM0_CTRL (0x3D8) - Read/Write
EDGE_PWM0_HIGH (0x3D9) - Read/Write
EDGE_PWM0_LOW (0x3DA) - Read/Write
Bit Default Description
15:9 0x00
Reserved
These bits are reserved and should be written as ‘0’.
8:6 0x0
Cmd
000: Idle. output pin remains at same state
001: Undefined, do not use
010: Undefined, do not use
011: Undefined, do not use
100: Assert logic ‘0’
101: One-shot -If previous state was assert ’0’, one-shot pulse will be high, If previous state was assert ’1’, one-
shot pulse will be low
110: Free run output
111: Assert logic ‘0’
50
Enable
0: PWM0 output is not enabled
1: PWM0 output is enabled on pin specified in Pin field using mode specified in Cmd field
4:0 0x00
Pin
Specifies which pin (E31 - E0) will be assigned to PWM0 output.
Bit Default Description
15:12 0x0
Reserved
These bits are reserved and should be written as ‘0’.
11:0 0x001
Value
This register specifies the high period for PWM0 in increments of 266.667ns. High period must be in the range
of 1 to 4095 (266.667 ns to 1.092 ms)
Bit Default Description
15:12 0x0
Reserved
These bits are reserved and should be written as ‘0’.
11:0 0x001
Value
This register specifies the low period for PWM0 in increments of 266.667ns. Low period must be in the range of
1 to 4095 (266.667 ns to 1.092 ms)
© 2015 Exar Corporation
XR22804
45 / 47 exar.com/XR22804
Rev 1B
EDGE_PWM1_CTRL (0x3DB) - Read/Write
EDGE_PWM1_HIGH (0x3DC) - Read/Write
EDGE_PWM1_LOW (0x3DD) - Read/Write
Bit Default Description
15:9 0x00
Reserved
These bits are reserved and should be written as ‘0’.
8:6 0x0
Cmd
000: Idle. output pin remains at same state
001: Undefined, do not use
010: Undefined, do not use
011: Undefined, do not use
100: Assert logic ‘0’
101: One-shot -If previous state was assert ’0’, one-shot pulse will be high, If previous state was assert ’1’, one-
shot pulse will be low
110: Free run output
111: Assert logic ‘0’
4:0 0x00
Pin
Specifies which pin (E31 - E0) will be assigned to PWM1 output.
Bit Default Description
15:12 0x0
Reserved
These bits are reserved and should be written as ‘0’.
11:0 0x001
Value
This register specifies the high period for PWM1 in increments of 266.667ns. High period must be in the range
of 1 to 4095 (266.667 ns to 1.092 ms)
Bit Default Description
15:12 0x0
Reserved
These bits are reserved and should be written as ‘0’.
11:0 0x001
Value
This register specifies the low period for PWM1 in increments of 266.667ns. Low period must be in the range of
1 to 4095 (266.667 ns to 1.092 ms)
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P47

XR22804IL56-F

Mfr. #:
Buy XR22804IL56-F
Manufacturer:
MaxLinear
Description:
I/O Controller Interface IC Hi-Speed USB 10/100 Eth Brdg w 4CH UART
Lifecycle:
New from this manufacturer.
Delivery:
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