P89LV51RB2_RC2_RD2_5 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 05 — 15 December 2009 27 of 76
NXP Semiconductors
P89LV51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
6.4 Timers/counters 0 and 1
The two 16-bit Timer/counter registers: Timer 0 and Timer 1 can be configured to operate
either as timers or event counters (see Table 14 and Table 15).
In the ‘Timer’ function, the register is incremented every machine cycle. Thus, one can
think of it as counting machine cycles. Since a machine cycle consists of six oscillator
periods, the count rate is
1
⁄
6
of the oscillator frequency.
In the ‘Counter’ function, the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin, T0 or T1. In this function, the external input is sampled
once every machine cycle.
When the samples show a HIGH in one cycle and a LOW in the next cycle, the count is
incremented. The new count value appears in the register in the machine cycle following
the one in which the transition was detected. Since it takes two machine cycles (12
oscillator periods) for 1-to-0 transition to be recognized, the maximum count rate is
1
⁄
12
of
the oscillator frequency. There are no restrictions on the duty cycle of the external input
signal, but to ensure that a given level is sampled at least once before it changes, it should
be held for at least one full machine cycle. In addition to the ‘Timer’ or ‘Counter’ selection,
Timer 0 and Timer 1 have four operating modes from which to select.
The ‘Timer’ or ‘Counter’ function is selected by control bits C/T in the special function
register TMOD. These two timer/counters have four operating modes, which are selected
by bit-pairs (M1, M0) in TMOD. Modes 0, 1, and 2 are the same for both timers/counters.
Mode 3 is different. The four operating modes are described in the following text.
Read Security Bit, Double Clock,
SoftICE
Input parameters:
ACC = 07H
Return parameter(s):
ACC = 000 S/N-match 0 SB 0 DBL_CLK
Read Security Bit, Double Clock,
SoftICE
Input parameters:
ACC = 07H
Return parameter(s):
ACC = 00 SoftICE S/N-match 0 SB 0 DBL_CLK
Erase sector Input parameters:
R1 = 08H
DPH = sector address high byte
DPL = sector address low byte
Return parameter(s):
ACC = 00 = pass
ACC = !00 = fail
Table 13. IAP function calls
…continued
IAP function IAP call parameters
Table 14. TMOD - Timer/counter mode control register (address 89H) bit allocation
Not bit addressable; reset value: 0000 0000B; reset source(s): any source.
Bit 7 6 5 4 3 2 1 0
Symbol T1GATE T1C/
T T1M1 T1M0 T0GATE T0C/T T0M1 T0M0
