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AX5051-1-WD1

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28
AX5051
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19
SPI Timing
Figure 3. Serial Peripheral Interface Timing
Tsh
R/ W
SS
SCK
MOSI
MISO
A6 A5 A4 A3 A2 A1
D7
A0 D6 D5 D4 D0D1D2D3
D7 D6 D5 D4 D3 D2
D1
D0S6 S5 S4 S3 S2 S1 S0
Tssd Tco
Tss Tck TchTcl ThTs
Tssz
AX5051
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20
REGISTER BANK DESCRIPTION
This section describes the bits of the register bank in
detail. The registers are grouped by functional block to
facilitate programming.
No checks are made whether the programmed
combination of bits makes sense! Bit 0 is always the LSB.
NOTES: Whole registers or register bits marked as
reserved should be kept at their default values.
All addresses not documented here must not be
accessed, neither in reading nor in writing.
Table 21. CONTROL REGISTER MAP
Addr Name Dir Reset
Bit
Description
7 6 5 4 3 2 1 0
Revision & Interface Probing
0
REVISION R 00010100 SILICONREV(7:0) Silicon Revision
1 SCRATCH RW 11000101 SCRATCH(7:0) Scratch Register
Operating Mode
2
PWRMODE RW 0−−−0000 RST − − − PWRMODE(3:0) Power Mode
Crystal Oscillator, Part 1
3
XTALOSC RW −−−−0010 − − − − XTALOSCGM(3:0) GM of Crystal
Oscillator
FIFO, Part 1
4
FIFOCTRL RW −−−−−−11 FIFOSTAT(1:0) FIFO
OVER
FIFO
UNDER
FIFO FULL FIFO
EMPTY
FIFOCMD(1:0) FIFO Control
5 FIFODATA RW −−−−−−−− FIFODATA(7:0) FIFO Data
Interrupt Control
6
IRQMASK RW −−000000 − − IRQMASK(5:0) IRQ Mask
7 IRQREQUEST R −−−−−−−− − − IRQREQUEST(5:0) IRQ Request
Interface & Pin Control
8
IFMODE RW −−−−0011 − − − − IFMODE(3:0) Interface Mode
Must be set to
0000
0C PINCFG1 RW 11111000 reserved IRQZ reserved SYSCLK(3:0) Pin Configuration 1
0D PINCFG2 RW 00000000 TST_PINS IRQE reserved reserved IRQI reserved Pin Configuration 2
TST_PINS(1:0)
must be set to 11
0E PINCFG3 R −−−−−−−− − − − SYSCLKR reserved IRQR reserved Pin Configuration 3
0F IRQINVERSION RW −−000000 − − IRQINVERSION(5:0) IRQ Inversion
Modulation & Framing
10
MODULATION RW −0000010 − MODULATION(6:0) Modulation
11 ENCODING RW −−−−0010 − − − − ENC
MANCH
ENC
SCRAM
ENC
DIFF
ENC INV Encoder/Decoder
Settings
12 FRAMING RW −0000000 FRMRX HSUPP CRCMODE(1:0) FRMMODE(2:0) FABORT Framing settings
14 CRCINIT3 RW 11111111 CRCINIT(31:24) CRC Initialization
Data or Preamble
15 CRCINIT2 RW 11111111 CRCINIT(23:16) CRC Initialization
Data or Preamble
16 CRCINIT1 RW 11111111 CRCINIT(15:8) CRC Initialization
Data or Preamble
17 CRCINIT0 RW 11111111 CRCINIT(7:0) CRC Initialization
Data or Preamble
Voltage Regulator
1B
VREG R −−−−−−−− − − − − SSDS SSREG SDS SREG Voltage Regulator
Status
AX5051
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21
Table 21. CONTROL REGISTER MAP
Addr Description
Bit
ResetDirNameAddr Description
01234567
ResetDirName
Synthesizer
20
FREQ3 RW 00111001 FREQ(31:24) Synthesizer
Frequency
21 FREQ2 RW 00110100 FREQ(23:16) Synthesizer
Frequency
22 FREQ1 RW 11001100 FREQ(15:8) Synthesizer
Frequency
23 FREQ0 RW 11001101 FREQ(7:0) Synthesizer
Frequency
25 FSKDEV2 RW 00000010 FSKDEV(23:16) FSK Frequency
Deviation
26 FSKDEV1 RW 01100110 FSKDEV(15:8) FSK Frequency
Deviation
27 FSKDEV0 RW 01100110 FSKDEV(7:0) FSK Frequency
Deviation
28 IFFREQHI RW 00100000 IFFREQ(15:8) 2nd LO / IF
Frequency
29 IFFREQLO RW 00000000 IFFREQ(7:0) 2nd LO / IF
Frequency
2C PLLLOOP RW −0011101 − reserve
d
BANDSEL PLLCPI(2:0) FLT(1:0) Synthesizer Loop
Filter Settings
2D PLLRANGING RW 00001000 STICK
Y
LOCK
PLL
LOCK
RNGERR RNG
START
VCOR(3:0) Synthesizer VCO
Auto−Ranging
Transmitter
30
TXPWR RW −−−−1000 – – – – TXRNG(3:0) Transmit Power
31 TXRATEHI RW 00001001 TXRATE(23:16) Transmitter Bitrate
32 TXRATEMID RW 10011001 TXRATE(15:8) Transmitter Bitrate
33 TXRATELO RW 10011010 TXRATE(7:0) Transmitter Bitrate
34 MODMISC RW ––––––11 – – – – – – reserved PTTCLK
GATE
Misc RF Flags
FIFO, Part 2
35
FIFOCOUNT R −−−−−−−− − − − − − FIFOCOUNT(2:0) FIFO Fill state
36 FIFOTHRESH RW −−−−−000 − − − − − FIFOTHRESH(2:0) FIFO Threshold
37 FIFOCONTROL
2
RW 0−−−−−00 CLEAR − − − − − STOPONERR(1:0) Additional FIFO
control
Receiver
3A
AGCATTACK RW 00010110 − − − AGCATTACK(4:0) AGC Attack
3B AGCDECAY RW 0–010011 reserved – reserved AGCDECAY(4:0) AGC Decay
3C AGCCOUNTER R –––––––– AGCCOUNTER(7:0) AGC Current Value
3D CICSHIFT R −−000100 − − reseved CICSHIFT(4:0) CIC Shift Factor
3F CICDEC RW 00000100 − − CICDEC(5:0) CIC Decimation
Factor
40 DATARATEHI RW 00011010 DATARATE(15:8) Datarate
41 DATARATELO RW 10101011 DATARATE(7:0) Datarate
42 TMGGAINHI RW 00000000 TIMINGGAIN(15:8) Timing Gain
43 TMGGAINLO RW 11010101 TIMINGGAIN(7:0) Timing Gain
44 PHASEGAIN RW 00––0011 reserved – – PHASEGAIN(3:0) Phase Gain
45 FREQGAIN RW 00001010 reserved FREQGAIN(3:0) Frequency Gain
46 FREQGAIN2 RW ––––1010 – – – – FREQGAIN2(3:0) Frequency Gain 2
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AX5051-1-WD1

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Manufacturer:
ON Semiconductor
Description:
IC RF TXRX ISM<1GHZ 28VFQFN
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