155Mbps to 2.5Gbps Burst-Mode Laser Driver
Maxim Integrated 13
MAX3643
Applications Information
Running Burst-Enable Single-Ended
See Figure 5 for setting up the single-ended LVTTL or
LVCMOS biasing for burst enable.
Layout Considerations
To minimize inductance, keep the connections
between the MAX3643 output pins and laser diode as
close as possible. Place a bypass capacitor as close
as possible to each V
CC
connection. Take extra care
to minimize stray parasitic capacitance on the BIAS
and MDIN pins. Use good high-frequency layout tech-
niques and multilayer boards with uninterrupted
ground planes to minimize EMI and crosstalk.
Laser Safety and IEC 825
Using the MAX3643 laser driver alone does not ensure
that a transmitter design is compliant with IEC 825. The
entire transmitter circuit and component selections must
be considered. Each user must determine the level of
fault tolerance required by the application, recognizing
that Maxim products are neither designed nor authorized
for use as components in systems intended for surgical
implant into the body, for applications intended to sup-
port or sustain life, or for any other application in which
the failure of a Maxim product could create a situation
where personal injury or death can occur.
Exposed-Paddle Package
The exposed paddle on the 24-pin TQFN provides a
very low thermal resistance path for heat removal from
the IC. The pad is also electrical ground on the
MAX3643 and must be soldered to the circuit board
ground for proper thermal and electrical performance.
Refer to Maxim Application Note 862:
HFAN-08.1:
Thermal Considerations of QFN and Other Exposed-
Paddle Packages
for additional information.
Figure 5. Single-Ended LVCMOS or LVTTL Biasing for Burst
Enable
