16
LTC4244/LTC4244-1
42441f
immediately to its I
LIMIT
value. If that supply remains in
current limit for more than 25µs, all of the supplies will be
latched off. The 25µs prevents quick current spikes—for
example, from a fan turning on—from causing false trips
of the circuit breaker.
After power-up, the 5V and 3.3V supplies are protected
from short circuits by dual-level circuit breakers. In the
event that either supply’s current exceeds the nominal
current limit, an internal timer is started. If the supply is
still overcurrent after
25
µs, the circuit breaker trips and all
the supplies are turned off (Figure 5). An analog current
limit loop prevents the supply current from exceeding 3×
the nominal current limit in the event of a short circuit
(Figure 6). The LTC4244 will stay in the latched off state
until the OFF/ON pin is cycled high then low or the 12V
IN
power supply is cycled low then high.
The current limit and the foldback current level for the 5V
and 3.3V outputs are both a function of the external sense
resistor. As shown in Figure 1, a sense resistor is con-
nected between 5V
IN
and 5V
SENSE
for the 5V supply. For
the 3.3V supply, a sense resistor is connected between
3.3V
IN
and 3.3V
SENSE
. The typical current limit and the
foldback current levels are given by Equations 6 and 7:
I
mV
R
LIMIT VOUT
SENSE VOUT
()
()
n
n
=
51
(6)
I
mV
R
FOLDBACK VOUT
SENSE VOUT
()
()
n
n
=
16
(7)
where
n
V
OUT
= 5V
OUT
or 3.3V
OUT
.
The current limit for the internal 12V switch is set at
850mA folding back to 360mA and the –12V switch at
610mA folding back to 225mA.
APPLICATIO S I FOR ATIO
WUUU
GATE
20V/DIV
5V
OUT
10V/DIV
FAULT
5V/DIV
TIMER
20V/DIV
5V
IN
– 5V
SENSE
100mV/DIV
10µs/DIV
4244 F05
Figure 5. Overcurrent Fault on 5V Output
GATE
20V/DIV
3.3V
OUT
5V/DIV
FAULT
5V/DIV
TIMER
20V/DIV
3V
IN
– 3V
SENSE
500mV/DIV
10µs/DIV
4244 F06
Figure 6. Short-Circuit Fault on 3.3V Output
17
LTC4244/LTC4244-1
42441f
Calculating R
SENSE
Determining the most appropriate value for the sense
resistor first requires knowing the maximum current needed
by the load under worst-case conditions. Two other pa-
rameters affect the value of the sense resistor. First is the
tolerance of the LTC4244’s circuit breaker threshold volt-
age. The LTC4244’s nominal circuit breaker threshold
voltage is V
CB(NOM)
= 52mV; however it exhibits ±5mV
tolerance over process and temperature. Second is the
tolerance (RTOL) of the sense resistor. Sense resistors are
available in RTOL’s of ±1%, ±2% and ±5% and exhibit
temperature coefficients of resistance (TCR’s) between
±75ppm/°C and ±100ppm/°C. How the sense resistor
changes as a function of temperature depends on the
I
2
• R power being dissipated by it. The power rating of the
sense resistor should accommodate steady-state fault
current levels so that the component is not damaged
before the circuit breaker trips.
Table 2 lists I
TRIP(MIN)
and I
TRIP(MAX)
versus some sug-
gested values of R
SENSE
. Table 7 lists manufacturers and
part numbers for these resistor values.
Table 2. I
TRIP
vs R
SENSE
R
SENSE
(1% RTOL) I
TRIP(MIN)
I
TRIP(MAX)
0.005 9.31A 11.5A
0.007 6.6A 8.2A
0.011 4.2A 5.2A
Output Voltage Monitor
The status of all four output voltages is monitored by the
power good function. In addition, the PCI_RST# signal is
logically combined on-chip with the HEALTHY# signal to
create LOCAL_PCI_RST# (see Table 3). As a result,
LOCAL_PCI_RST# will be pulled low whenever HEALTHY#
is pulled high independent of the state of the PCI_RST#
signal.
If any of the output voltages drop below the power good
threshold for more than 14µs, the PWRGD pin will be
pulled high and the LOCAL_PCI_RST# signal will be
asserted low.
Table 3. LOCAL_PCI_RST# Truth Table
PCI_RST# HEALTHY# LOCAL_PCI_RST#
LO LO LO
LO HI LO
HI LO HI
HI HI LO
Precharge
The PRECHARGE input and DRIVE output pins are in-
tended for use in generating the 1V precharge voltage that
is used to bias the bus I/O connector pins during board
insertion and extraction. The LTC4244 is also capable of
generating precharge voltages other than 1V. Figure 7
shows a circuit that can be used in applications requiring
a precharge voltage of less than 1V. The circuit in Figure␣ 8
can be used for applications that need precharge voltages
greater than 1V.
Precharge resistors are used to connect the 1V bias volt-
age to the I/O lines with minimal disturbance. Figure 1
shows the precharge application circuit for 5V signaling.
The precharge resistor requirements are more stringent
for 3.3V and Universal Hot Swap boards. If the total leak-
age current on the I/O line is less 2µA, then a 50k resistor
can be connected directly from the 1V bias voltage to the
I/O line. However, many ICs connected to the I/O lines can
have leakage currents up to 10µA. For these applications,
a 10k resistor is used but must be disconnected when the
board is seated as determined by the state of the BD_SEL#
signal. Figure 9 shows a precharge circuit that uses a bus
switch to connect the individual 10k precharge resistors to
the LTC4244’s 1V PRECHARGE pin. The electrical connec-
tion is made (bus switches closed) when the voltage on the
BD_SEL# pin of the plug-in card is pulled-up to 5V
IN
,
which occurs just after the long pins have made contact.
The bus switches are electrically disconnected when the
short, BD_SEL# connector pin makes contact and the
APPLICATIO S I FOR ATIO
WUUU
18
LTC4244/LTC4244-1
42441f
APPLICATIO S I FOR ATIO
WUUU
Figure 8. Precharge Voltage >1V Application Circuit
Q3
MMBT2222A
12
5%
3.3V
IN
4244 F08
1k
5%
18
5%
R10BR10A
PRECHARGE OUT
*ADDITIONAL DETAILS OMITTED FOR CLARITY
4.7nF
11
128
R10A + R10B
R10A
V
PRECHARGE
=
• 1V
DRIVEPRECHARGE
LTC4244*
GND
Figure 7. Precharge Voltage <1V Application Circuit
Q3
MMBT2222A
12
5%
3.3V
IN
4244 F07
1k
5%
18
5%
R10BR10A
PRECHARGE OUT
*ADDITIONAL DETAILS OMITTED FOR CLARITY
4.7nF
11
128
R10A
R10A + R10B
V
PRECHARGE
=
• 1V
DRIVEPRECHARGE
LTC4244*
GND
5V
IN
C9
0.01µF PER
POWER PIN
13
5
12 11
Z4: SMAJ5.0A
*ADDITIONAL DETAILS OMITTED FOR CLARITY
DATA BUS
I/O
4244 F09
Q3
MMBT2222A
8
R10
18 5%
R19
1k 5%
3V
IN
R13
10
5%
R11
10k
5%
R12
10k
5%
PRECHARGE OUT
1V ±10%
I
OUT
= ±55mA
I/O
R14
10
5%
R22
2.7
R8
1k 5%
R7
12 5%
C3 4.7nF
R9
24
PCI
BRIDGE
CHIP
5V
LONG 5V
BD_SEL#
GROUND
I/O PIN 1
I/O PIN 128
• • •
• • •
• • •
Z4
C7
0.01µF
UP TO 128 I/O LINES
0.1µF
100
Q2
MMBT3906
R23
51.1k 5%
R24
75k
5%
BUS SWITCH
V
DD
OE
OUT OUT
IN
PCB EDGE
BACKPLANE
CONNECTOR
BACKPLANE
CONNECTOR
R20
1.2k
5%
GND
5V
IN
OFF/ON
LTC4244*
PRECHARGE DRIVE
Figure 9. Precharge Bus Switch Application Circuit for 3.3V and Universal Hot Swap Boards

LTC4244IGN-1#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Hot Swap Voltage Controllers Rugged, CompactPCI Bus Hot Swap Cntrs
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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