7
LTC4244/LTC4244-1
42441f
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12V
IN
(Pin 1): 12V Supply Input. A 0.5 switch is con-
nected between 12V
IN
and 12V
OUT
with a foldback current
limit. An undervoltage lockout circuit prevents the switches
from turning on while the 12V
IN
pin voltage is less than 9V.
12V
IN
also provides power to the LTC4244’s internal V
CC
node.
V
EEIN
(Pin 2):12V Supply Input. A 1 switch is con-
nected between V
EEIN
and V
EEOUT
with a foldback current
limit. An undervoltage lockout circuit prevents the switches
from turning on while the V
EEIN
pin voltage is greater than
9.25V. The V
EEIN
undervoltage lockout function is dis-
abled for the LTC4244-1.
5V
OUT
(Pin 3): 5V Output Sense. The PWRGD pin will not
pull low until the 5V
OUT
pin voltage exceeds 4.61V. A 200
active pull-down discharges 5V
OUT
to ground when the
power switches are turned off.
TIMER (Pin 4): Current Fault Inhibit Timing Input and
Auxiliary V
CC
. Connect a capacitor from TIMER to GND.
When the LTC4244 is turned on, a 21µA pull-up current
source is connected to TIMER. Current limit faults will be
ignored until the voltage at the TIMER pin rises to within
1.6V of 12V
IN
. After the TIMER pin has completed ramp-
ing up, the TIMER capacitor serves as an auxiliary charge
reservoir for V
CC
in the event the 12V
IN
pin voltage
momentarily drops below the undervoltage lockout thresh-
old voltage. When the LTC4244 is turned off (OFF/ON >
2V), the TIMER pin is pulled down to GND. After the TIMER
pin voltage drops to within 0.8V of GND, the TIMER latch
is reset and the part is ready for another power cycle.
OFF/ON
(Pin 5): Digital Input. Connect the CPCI BD_SEL#
signal to the OFF/ON pin. When the OFF/ON pin is pulled
low, the GATE pin is pulled high by a 67µA current source
and the internal 12V and –12V switches are turned on.
When the OFF/ON pin is pulled high, the GATE pin will be
pulled to ground by a 60µA current source and the 12V and
–12V switches turn off.
FAULT (Pin 6): Open-Drain Digital I/O. FAULT is pulled low
when a current limit fault is detected. Current limit faults
are ignored until the voltage at the TIMER pin is within 1.6V
of 12V
IN
. Once the TIMER cycle is complete, FAULT will
pull low and the LTC4244 latches off in the event of an
overcurrent fault. The part will remain in the latched off
state until the OFF/ON pin is cycled high then low. Forcing
the FAULT pin low with an external pull-down will cause
the part to latch into the off state after a 25µs deglitching
time.
PWRGD (Pin 7): Open-Drain Digital Power Good Output.
Connect the CPCI HEALTHY# signal to the PWRGD pin.
PWRGD remains low while V
12VOUT
11.1V, V
3.3VOUT
2.9V, V
5VOUT
4.61V, and V
EEOUT
11.1V. When any of
the supplies falls below its power good threshold voltage,
PWRGD will go high after a 14µs deglitching time.
GND (Pin 8): Device Ground.
RESETIN (Pin 9): Digital Input. Connect the CPCI PCI_RST#
signal to the RESETIN pin. Pulling the RESETIN pin low will
cause RESETOUT to pull low. RESETOUT will also pull low
when PWRGD is high.
8
LTC4244/LTC4244-1
42441f
RESETOUT (Pin 10): Open-Drain Digital Output. Connect
the CPCI_LOCAL_RST# signal to the RESETOUT pin.
RESETOUT is the logical combination of the RESETIN and
PWRGD.
DRIVE (Pin 11): Precharge Base Drive Output. Provides
base drive for an external NPN emitter-follower that in turn
biases the PRECHARGE node.
PRECHARGE (Pin 12): Precharge Monitor Input. An inter-
nal error amplifier servos the DRIVE pin voltage to keep the
PRECHARGE node at 1V. See Applications Information for
generating voltages other than 1V. If not used, tie the
PRECHARGE pin to ground.
5V
IN
(Pin 13): 5V Supply Sense Input. An undervoltage
lockout circuit prevents the switches from turning on
when the voltage at the 5V
IN
pin is less than 4.25V.
5V
SENSE
(Pin 14): 5V Current Limit Sense. With a sense
resistor placed in the supply path between 5V
IN
and
5V
SENSE
, the GATE pin voltage will be adjusted to maintain
a constant 51mV across the sense resistor and a constant
current through the switch while the TIMER pin is low. A
foldback feature makes the current limit decrease as the
voltage at the 5V
OUT
pin approaches GND. When the
TIMER pin is high, the circuit breaker function is enabled.
If the voltage across the sense resistor exceeds 52mV, the
circuit breaker is tripped after a 25µs time delay. In the
event of a short-circuit or large overcurrent transient
condition, the GATE pin voltage will be adjusted to main-
tain a constant 150mV across the sense resistor and a
constant current through the switch.
GATE (Pin 15): High Side Gate Drive for the External 3.3V
and 5V N-Channel Pass Transistors. An external series RC
network is required for current limit loop compensation
and setting the minimum ramp-up time. During power-up,
the slope of the voltage rise at the GATE is set by the 67µA
current source connected through a Schottky diode to
12V
IN
and the external capacitor connected to GND (C1 in
Figure 1) or by the 3.3V or 5V current limit and the bulk
capacitance in the 3.3V
OUT
or 5V
OUT
supply lines. During
power down, the slew rate of the GATE voltage is set by the
60µA current source connected to GND and the external
GATE capacitor (C1 in Figure 1).
The voltage at the GATE pin will be modulated to maintain
a constant current when either the 5V or 3.3V supplies go
into current limit. In the event of an overcurrent fault, the
GATE pin is immediately pulled to GND.
3.3V
SENSE
(Pin 16): 3.3V Current Limit Sense. With a
sense resistor placed in the supply path between 3.3V
IN
and 3.3V
SENSE
, the GATE pin voltage will be adjusted to
maintain a constant 51mV across the sense resistor and a
constant current through the switch while the TIMER pin
is low. A foldback feature makes the current limit decrease
as the voltage at the 3.3V
OUT
pin approaches GND. When
the TIMER pin is high, the circuit breaker function is
enabled. If the voltage across the sense resistor exceeds
52mV, the circuit breaker is tripped after a 25µs time delay.
In the event of a short-circuit or large overcurrent transient
condition, the GATE pin voltage will be adjusted to main-
tain a constant 150mV across the sense resistor and a
constant current through the switch.
If no 3.3V input supply is available, short the 3.3V
SENSE
pin
to the 5V
IN
pin.
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9
LTC4244/LTC4244-1
42441f
3.3V
IN
(Pin 17): 3.3V Supply Sense Input. An undervolt-
age lockout circuit prevents the switches from turning on
when the voltage at the 3.3V
IN
pin is less than 2.5V. If no
3.3V input supply is available, short the 3.3V
IN
pin to the
5V
IN
pin.
3.3V
OUT
(Pin 18): Analog Input Used to Monitor the 3.3V
Output Supply Voltage. The PWRGD pin cannot pull low
until the 3.3V
OUT
pin voltage exceeds 2.9V. If no 3.3V input
supply is available, tie the 3.3V
OUT
pin to the 5V
OUT
pin. A
200 active pull-down discharges 3.3V
OUT
to ground
when the power switches are turned off.
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V
EEOUT
(Pin 19): -12V Supply Output. A 1 switch is
connected between V
EEIN
and V
EEOUT
. V
EEOUT
must be less
than –11.1V before the PWRGD pin pulls low. The V
EEOUT
power good comparator is disabled for the LTC4244-1. A
390 active pull-up discharges V
EEOUT
to ground when
the power switches are turned off.
12V
OUT
(Pin 20): 12V Supply Output. A 0.5 switch is
connected between 12V
IN
and 12V
OUT
. 12V
OUT
must
exceed 11.1V before the PWRGD pin can pull low. A 440
active pull-down discharges 12V
OUT
to ground when the
power switches are turned off.

LTC4244IGN-1#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Hot Swap Voltage Controllers Rugged, CompactPCI Bus Hot Swap Cntrs
Lifecycle:
New from this manufacturer.
Delivery:
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