22
LTC4244/LTC4244-1
42441f
PCB Layout Considerations
For proper operation of the LTC4244’s circuit breaker,
4-wire Kelvin sense connections between the sense resis-
tor and the LTC4244’s 5V
IN
and 5V
SENSE
pins and 3.3V
IN
and 3.3V
SENSE
pins are strongly recommended. The PCB
layout should be balanced and symmetrical to minimize
wiring errors. In addition, the PCB layout for the sense
resistors and the power MOSFETs should include good
thermal management techniques for optimal device power
dissipation. A recommended PCB layout for the sense
resistor, the power MOSFET and the GATE drive compo-
nents around the LTC4244 is illustrated in Figure 15. In Hot
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Swap applications where load currents can be 10A, nar-
row PCB tracks exhibit more resistance than wider tracks
and operate at more elevated temperatures. Since the
sheet resistance of 1 ounce copper foil is approximately
0.45m/o, track resistance and voltage drops add up
quickly in high current applications. Thus, to keep PCB
track resistance, voltage drop and temperature to a mini-
mum, the suggested trace width in these applications for
1 ounce copper foil is 0.03” for each ampere of DC current.
In the majority of applications, it will be necessary to use
plated-through vias to make circuit connections from
component layers to power and ground layers internal to
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
LTC4244*
CURRENT FLOW
TO SOURCE
*ADDITIONAL DETAILS OMITTED FOR CLARITY
DRAWING IS NOT TO SCALE!
4244 F15
TRACK WIDTH W:
0.03" PER AMPERE
ON 1 OZ Cu FOIL
D
D
D
D
G
S
S
S
CURRENT FLOW
TO LOAD
CURRENT FLOW
TO LOAD
SENSE
RESISTOR
SO-8
VIA TO
GND PLANE
GNDGND
3.3V
OUT
3.3V
3.3V
IN
3.3V
VIA/PATH
TO GND
GATE
R3
R5
C1
C
TIMER
WW
W
Figure 15. Recommended Layout for Power MOSFET, Sense Resistor and GATE Components for the 3.3V Rail
23
LTC4244/LTC4244-1
42441f
the PC board. For 1 ounce copper foil plating, a general rule
is 1 ampere of DC current per via making sure the via is
properly dimensioned so that solder completely fills the
void. For other plating thicknesses, check with your PCB
fabrication facility.
Design Example
As a design example, consider a CPCI Hot Swap applica-
tion with the following power supply requirements:
Table 4. Design Example Power Supply Requirements
VOLTAGE MAXIMUM DC LOAD
SUPPLY SUPPLY CURRENT CAPACITANCE
12V 450mA 100µF
5V 5A 2200µF
3.3V 7A 2200µF
–12V 100mA 100µF
The first step is to select the appropriate values of R
SENSE
for the 5V and 3.3V supplies. Calculating the value of
R
SENSE
is based on I
LOAD(MAX)
and the lower limit for the
circuit breaker threshold voltage (47mV for both the 5V
and 3.3V circuit breakers). If a 1% tolerance is assumed
for the sense resistors, then 5m and 7m resistor
values yield the following minimum and maximum I
TRIP
values:
Table 5. I
TRIP
vs R
SENSE
R
SENSE
(1% RTOL) I
TRIP(MIN)
I
TRIP(MAX)
5m 9.3A 11.5A
7m 6.6A 8.2A
So sense resistor values of 7m and 5m should suffice
for the 5V and 3.3V supplies, respectively.
The second step is to select MOSFETs for the 5V and 3.3V
supplies. The IRF7457’s on resistance is less than 10.5m
for V
GS
> 4.5V and a junction temperature of 25°C. Since
the maximum load current requirement for the 3.3V sup-
ply is 7A, the steady-state power the device may be
required to dissipate is 514mW. The IRF7457 has a
junction-to-ambient thermal resistance of 50°C/Watt. If a
maximum ambient temperature of 50°C is assumed, this
yields a junction temperature of 75.7°C. According to the
IRF7457’s Normalized On-Resistance vs Junction Tem-
perature curve, the device’s on-resistance can be expected
to increase by about 20% over its room temperature value.
Recalculation of the steady-state values of R
ON
and junc-
tion temperature yields approximately 12.6m and 81°C,
respectively. The I • R drop across the 3.3V sense resistor
and series MOSFET at maximum load current under these
conditions will be less than 124mV.
The next step is to select appropriate values for C1
and
C
TIMER
. Assuming that the total current for the 5V supply
is constrained to less than 6A during power-up (6 × 5V
medium length connector pins at 1A per pin), then the
inrush current shouldn’t exceed:
I
INRUSH
< 6A – I
LOAD(5VOUT)
= 6A – 5A = 1A (12)
This yields:
C
IF
I
C
AF
A
nF
GATE MAX
INRUSH MAX
1
2200
1
100 2200
1
220
>
µ
⇒>
µµ
=
()
()
(13)
Hence a C1 value of 330nF ±10% should suffice. The value
of C
TIMER
for this design example will be constrained by
the duration of the 12V supply inrush current, which
according to Equation 2 is:
t
CV
II
t
FV
mA mA
ms
ON VOUT
LOAD
LIMIT MIN LOAD MAX
ON VOUT
()
() ( )
()
••
••
12
12
212
2 100 12
550 450
24
<
⇒<
µ
=
(14)
In order to guarantee that the LTC4244’s TIMER fault
inhibit period is greater than 24ms, the value of C
TIMER
should be:
C
ms I
VV
C
ms A
VV
nF
TIMER
TIMER MAX
TIMER MAX
TIMER
>
⇒>
µ
=
24
12
24 26
12 1 9
61 8
–.
.
()
()
(15)
So a value of 82nF (±10%) should suffice.
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24
LTC4244/LTC4244-1
42441f
OUTPUT VOLTAGE (V)
0
DISSIPATED POWER (W)
15
20
25
4
4244 F16
10
5
0
1
2
3
5
5V MOSFET
5V R
SENSE
= 0.007
3.3V R
SENSE
= 0.005
3.3V MOSFET
Figure 16. Worst-Case 5V and 3.3V MOSFET
Dissipated Power vs Output Voltage
The next step is to verify that the thermal ratings of the
external 5V and 3.3V MOSFETs aren’t being exceeded
during power-up cycles into the designed loads or into a
short circuit.
The amount of heating in the 5V and 3.3V MOSFETs during
a normal power cycle depends on the LTC4244’s GATE pin
current (refer to Gate Current vs Temperature plot in the
Typical Performance Characteristics section). The magni-
tude of the off-on power pulse that results in maximum
heating of the MOSFETs is given by Equation 10 as:
P
VI I
OUT INRUSH MIN LOAD VOUT
OFF-ON
=
+
()
n
n
() ( )
2
(16)
where
I
C
C MAX
I
INRUSH MIN
LOAD
GATE MIN() ()
()
=
1
(17)
The duration of the power-pulse is given by Equation 11
as:
t
CV
I
INRUSH
LOAD OUT
INRUSH MIN
<
()
n
(18)
Solving these equations for the 5V and 3.3V supplies
yields:
Table 6
P
OFF-ON
t
INRUSH(MAX)
5V MOSFET 12.8W 90ms
3.3V MOSFET 11.8W 60ms
Under these conditions, the IRF7457 datasheet’s Thermal
Response vs Pulse Duration curve indicates that the
junction-to-ambient temperature will increase by 60°C for
the 5V MOSFET and 46°C for the 3.3V MOSFET.
The duration and magnitude of the power pulse that
results during a short-circuit condition on either the 5V or
3.3V outputs are a function of the TIMER capacitor and the
LTC4244’s foldback current limit. Figure 16 shows the
worst-case power dissipated in the 5V and 3.3V external
FETs vs V
5VOUT
and V
3.3VOUT
, respectively. In the case of
the 3.3V external MOSFET, the maximum dissipated power
is 24 Watts (V
3.3VOUT
= 0.9V). For the 5V external MOSFET,
the maximum dissipated power is 22 Watts (V
5VOUT
=
1.75V). The maximum duration of the short-circuit power-
pulse is given by Equation 19 as:
tC
VV
I
t
nF nF V V
A
tms
PULSE TIMER MAX
TIMER MIN
TIMER MIN
PULSE
PULSE
<
⇒<
+
()()
µ
⇒<
()
()
()
.• .
.
12
82 8 2 12 1 3
16
60 3
(19)
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LTC4244IGN-1#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Hot Swap Voltage Controllers Rugged, CompactPCI Bus Hot Swap Cntrs
Lifecycle:
New from this manufacturer.
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