5
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LT1994
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The inputs are protected by a pair of back-to-back diodes. If the
differential input voltage exceeds 1V, the input current should be limited to
less than 10mA.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefi nitely.
Note 4: The LT1994C/LT1994I are guaranteed functional over the
operating temperature range –40°C to 85°C. The LT1994H is guaranteed
functional over the operating temperature range –40°C to 125°C. The
LT1994MP is guaranteed functional over the operating temperature range
–55°C to 125°C.
Note 5: The LT1994C is guaranteed to meet specifi ed performance from
0°C to 70°C. The LT1994C is designed, characterized, and expected to
meet specifi ed performance from –40°C to 85°C but is not tested or
QA sampled at these temperatures. The LT1994I is guaranteed to meet
specifi ed performance from –40°C to 85°C. The LT1994H is guaranteed
to meet specifi ed performance from –40°C to 125°C. The LT1994MP is
guaranteed to meet specifi ed performance from –55°C to 125°C.
Note 6: Input bias current is defi ned as the average of the input currents
fl owing into Pin 1 and Pin 8 (IN
–
and IN
+
). Input Offset current is defi ned
as the difference of the input currents fl owing into Pin 8 and Pin 1
(I
OS
= I
B
+
– I
B
–
).
Note 7: Input Common Mode Range is tested using the Test Circuit of
Figure 1 (R
F
= R
I
) by applying a single ended 2V
P-P
, 1kHz signal to V
INP
(V
INM
= 0), and measuring the output distortion (THD) at the common
mode Voltage Range limits listed in the Electrical Characteristics table,
and confi rming the output THD is better than –40dB. The voltage range for
the output common mode range (Pin 2) is tested using the Test Circuit of
Figure 1 (R
F
= R
I
) by applying a 0.5V peak, 1kHz signal to the V
OCM
Pin 2 (with V
INP
= V
INM
= 0) and measuring the output distortion (THD)
at V
OUTCM
with V
OCM
biased 0.5V from the V
OCM
pin range limits listed
in the Electrical Characteristics Table, and confi rming the THD is better
than –40dB.
Note 8: Input CMRR is defi ned as the ratio of the change in the input
common mode voltage at the pins IN
+
or IN
–
to the change in differential
input referred voltage offset. Output CMRR is defi ned as the ratio of the
change in the voltage at the V
OCM
pin to the change in differential input
referred voltage offset.
Note 9: Differential Power Supply Rejection (PSRR) is defi ned as the ratio
of the change in supply voltage to the change in differential input referred
voltage offset. Common Mode Power Supply Rejection (PSRRCM) is
defi ned as the ratio of the change in supply voltage to the change in the
common mode offset, V
OUTCM
– V
OCM
.
Note 10: Output swings are measured as differences between the output
and the respective power supply rail.
Note 11: Extended operation with the output shorted may cause junction
temperatures to exceed the 150°C limit and is not recommended.
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
A
= 25°C. V
+
= 3V, V
–
= 0V, V
CM
= V
OCM
= V
ICM
= mid-supply, V
SHDN
= OPEN,
R
I
= R
F
= 499Ω, R
L
= 800Ω to a mid-supply voltage (See Figure 1) unless otherwise noted. V
S
is defi ned (V
+
– V
–
). V
OUTCM
is defi ned
as (V
OUT
+
+ V
OUT
–
)/2. V
ICM
is defi ned as (V
IN
+
+ V
IN
–
)/2. V
OUTDIFF
is defi ned as (V
OUT
+
– V
OUT
–
). V
INDIFF
is defi ned as (V
IN
+
– V
IN
–
).
SYMBOL PARAMETER CONDITIONS
C/I GRADES H/MP GRADES
UNITSMIN TYP MAX MIN TYP MAX
V
IL
SHDN Input Logic Low V
S
= 3V to ±5V
l
V
+
– 2.1
V
+
– 2.1
V
V
IH
SHDN Input Logic High V
S
= 3V to ±5V
l
V
+
– 0.6
V
+
– 0.6
V
R
SHDN
SHDN Pull-Up Resistor V
S
= 2.375V to ±5V 40 55 75 40 55 75
kΩ
t
ON
Turn-On Time V
SHDN
0.5V to 3V 1 1 s
t
OFF
Turn-Off Time V
SHDN
3V to 0.5V 1 1 s
