SiC620R, SiC620AR
www.vishay.com
Vishay Siliconix
S14-2189, Rev. A 03-Nov-14
5
Document Number: 63589
For technical questions, contact: powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Notes
(1)
Typical limits are established by characterization and are not production tested.
(2)
Guaranteed by design.
DETAILED OPERATIONAL DESCRIPTION
PWM Input with Tri-state Function
The PWM input receives the PWM control signal from the VR
controller IC. The PWM input is designed to be compatible
with standard controllers using two state logic (H and L) and
advanced controllers that incorporate tri-state logic (H, L
and tri-state) on the PWM output. For two state logic, the
PWM input operates as follows. When PWM is driven above
V
PWM_TH_R
the low-side is turned on and the high-side is
turned on. When PWM input is driven below V
PWM_TH_F
the
high-side is turned OFF and the low-side is turned ON. For
tri-state logic, the PWM input operates as previously stated
for driving the MOSFETs. However, there is an third state
that is entered as the PWM output of tri-state compatible
controller enters its high impedance state during shut-down.
The high impedance state of the controller’s PWM output
allows the SiC620R and SiC620AR to pull the PWM input
into the tri-state region (see PWM Timing Diagram). If the
PWM input stays in this region for the tri-state hold-off
period, t
TSHO
, both high-side and low-side MOSFETs are
turned OFF. This function allows the VR phase to be
disabled without negative output voltage swing caused by
inductor ringing and saves a Schottky diode clamp. The
PWM and tri-state regions are separated by hysteresis to
prevent false triggering. The SiC620AR incorporates PWM
voltage thresholds that are compatible with 3.3 V logic and
the SiC620R thresholds are compatible with 5 V logic.
Disable (DSBL#)
In the low state, the DSBL# pin shuts down the driver IC and
disables both high-side and low-side MOSFETs. In this
state, standby current is minimized. If DSBL# is left
unconnected, an internal pull-down resistor will pull the pin
to C
GND
and shut down the IC.
Diode Emulation Mode (ZCD_EN#)
When ZCD_EN# pin is logic Low and PWM signal switches
Low, GL is forced on (after normal BBM time). During this
time, it is under control of the ZCD (zero crossing detect)
comparator. If, after the internal blanking delay, the inductor
current becomes zero, the low-side is turned off. This
improves light load efficiency by avoiding discharge of
output capacitors. If PWM enters tri-state, then device will
go into normal tri-state mode after tri-state delay. The GL
output will be turned off regardless of Inductor current, this
is an alternative method of improving light load efficiency by
reducing switching losses.
Thermal Shutdown Warning (THWn)
The THWn pin is an open drain signal that flags the presence
of excessive junction temperature. Connect with a
maximum of 20 kΩ, to V
CIN
. An internal temperature sensor
detects the junction temperature. The temperature
threshold is 160 °C. When this junction temperature is
exceeded the THWn flag is set. When the junction
temperature drops below 135 °C the device will clear the
THWn signal. The SiC620R and SiC620AR do not stop
operation when the flag is set. The decision to shutdown
must be made by an external thermal control function.
Voltage Input (V
IN
)
This is the power input to the drain of the high-side power
MOSFET. This pin is connected to the high power
intermediate BUS rail.
DSBL# ZCD_EN# INPUT
DSBL# Logic Input Voltage
V
IH_DSBL#
Input logic high 2 - -
V
V
IL_DSBL#
Input logic low - - 0.8
ZCD_EN# Logic Input Voltage
V
IH_ZCD_EN#
Input logic high 2 - -
V
IL_ZCD_EN#
Input logic low - - 0.8
PROTECTION
Under Voltage Lockout V
UVLO
V
CIN
rising, on threshold - 3.7 4.1
V
V
CIN
falling, off threshold 2.7 3.1 -
Under Voltage Lockout Hysteresis V
UVLO_HYST
- 575 - mV
THWn Flag Set
(2)
T
THWn_SET
- 160 -
°CTHWn Flag Clear
(2)
T
THWn_CLEAR
- 135 -
THWn Flag Hysteresis
(2)
T
THWn_HYST
-25-
THWn Output Low V
OL_THWn
I
THWn
= 2 mA - 0.02 - V
ELECTRICAL SPECIFICATIONS
(DSBL# = ZCD_EN# = 5 V, V
IN
= 12 V, V
DRV
and V
CIN
= 5 V, T
A
= 25 °C)
PARAMETER SYMBOL TEST CONDITION
LIMITS
UNIT
MIN. TYP. MAX.
