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DS1558W-TRL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18
1 of 18
REV: 071305
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
FEATURES
Integrated Real-Time Clock (RTC), Power-
Fail Control Circuit, and NV RAM Controller
Clock Registers are Accessed Identically to
the Static RAM; These Registers are Resident
in the 16 Top RAM Locations
Century Register
Greater than 10 Years of Timekeeping and
Data Retention in the Absence of Power with
Small Lithium Coin Cell(s) and Low-Leakage
SRAM
Precision Power-On Reset
Programmable W
Alarm
BCD-Coded Year, Month, Date, Day, Hours,
Minutes, and Seconds with Automatic Leap-
Year Compensation Valid Up to the Year
2100
Battery Voltage-Level Indicator Flag
Power-Fail Write Protection Allows for 10%
V
CC
Power-Supply Tolerance
Underwriters Laboratory (UL) Recognized
PIN CONFIGURATION
ORDERING INFORMATION
PART TEMP RANGE
VOLTAGE
(V)
PIN-PACKAGE TOP MARK*
DS1558
Watchdog Clock with NV RAM Control
www.maxim-ic.com
atchdog Timer and RTC
DS1558W -40°C to +85°C 3.3 48 TQFP (7 x 7 x 1mm) DS1558D
DS1558W+ -40°C to +85°C 3.3 48 TQFP (7 x 7 x 1mm) DS1558D
DS1558W-TRL -40°C to +85°C 3.3 48 TQFP (7 x 7 x 1mm) DS1558D
DS1558W+TRL -40°C to +85°C 3.3 48 TQFP (7 x 7 x 1mm) DS1558D
DS1558Y -40°C to +85°C 5.0 48 TQFP (7 x 7 x 1mm) DS1558B
DS1558Y+ -40°C to +85°C 5.0 48 TQFP (7 x 7 x 1mm) DS1558B
DS1558Y-TRL -40°C to +85°C 5.0 48 TQFP (7 x 7 x 1mm) DS1558B
DS1558Y+TRL -40°C to +85°C 5.0 48 TQFP (7 x 7 x 1mm) DS1558B
+ Denotes a lead(Pb)-free/RoHS-compliant device.
* A “+” anywhere on the top mark indicates a lead-free device.
A18
A16
A12
A6
A4
A3
A2
A1
A5
A7
A14
N.C.
V
CCO
V
CC
N.C.
A
17
GND
R
ST
N.C.
N.C.
DQ0
DQ1
DQ2
DQ6
V
BAT1
W
E
I
RQ
/
FT
A
8
O
E
A
10
E
X
1
GND
V
BAT
2
A
15
A
13
O
ER
A
9
A
11
35
36
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
10
12
11
9
48
47
46
45
44
43
42
41
40
39
38
37
CER
DQ7
DQ5
DQ4
DQ3
GND
A0
DS1558
X
2
N.C.
TQFP
TOP VIEW
DS1558
2 of 18
PIN DESCRIPTION
PIN NAME FUNCTION
1, 13, 39
N.C. No Connection
41, 4
3
2 A18
3 A16
4 A14
5 A12
6 A7
7 A6
8 A5
9 A4
10 A3
11 A2
12 A1
14 A0
27 A10
29 A11
30 A9
31 A8
32 A13
36 A15
44 A17
r Ad ess Decode. T e inputs to determine
read o write cycle should cted to the attached SRAM or to the
Address Inputs fo
whether or not a
RTC registers.
dr h DS1558 uses the address
r be dire
15 DQ0
16 DQ1
17 DQ2
19 DQ3
20 DQ4
21 DQ5
22 DQ6
23 DQ7
Data Input/Outputs. Data input/output pins for the RTC registers.
18, 45,
48
GND Ground
24
CER
Active-Low Chip-Enable RAM. CE is passed through to CER, with an added
propagation delay. When the signals on A0–A18 match an RTC address, CER is held
high, disabling the SRAM. If OE is also low, the RTC outputs data on DQ0–DQ7.
25
OER
Active-Low Output-Enable RAM. OE is passed through to OER, with an added
propagation delay. When the signals on A0–A18 match an RTC address, CER is held
high, disabling the SRAM. If CE is also low, the RTC outputs data on DQ0–DQ7.
26
CE
Active-Low Chip-Enable Input. Used to access the RTC and the external SRAM.
28
OE
Active-Low Output-Enable Input. Used to access the RTC and the external SRAM.
33
IRQ/FT
Active-Low Interrupt/Frequency-Test Output. This pin is used to output the alarm
interrupt or the frequency test signal. It is open drain and requires an external pullup
resistor.
34
WE
Active-Low Write Enable. Used to write data to the RTC registers.
DS1558
3 of 18
PIN CRIP tin
NAME
ON
DES TION (con ued)
PIN
FUNCTI
35 V
BAT1
37 V
BAT2
puts fo y Sta el Energy Source. Battery
ust be betw r p ation. UL recognized to
ainst re e cha ed ium battery. If only one
used, it should b nd uld be grounded. See
ns
of Acceptabil c.com/TechSupport/QA/ntrl.htm
battery
is
Battery In r An ndard +3V Lithium C l or Other
voltage m held een 2.5V and 3.7V fo roper oper
ensure ag vers rging current when us with a lith
e attached to V
BAT1
, a V
BAT2
sho
“Conditio ity” at www.maxim-i
.
38
RST
CC
is out of tolerance. On power-up,
the system to stabilize. The
Active-Low
Power-On Reset Output (Open Drain). This pin is an output used to signal
RST is held
low for a period of time to allow
RTC and SRAM are not accessible while RST is active. This
pin is open drain and requires an external pullup resistor.
that V
40 V
CCO
V
CC
Output to RAM. While V
CC
is above V
BAT
, the external SRAM is powered by V
CC
.
When V
CC
is below the battery level, the SRAM is powered by one of the V
BAT
inputs.
42 V
CC
Power-Supply Input. DC power is provided to the device on these pins. V
CC
is the +5V
input. When 5V (or 3.3V for the 3.3V version) is applied within normal limits, the device
is fully accessible and data can be written and read. Reads and writes are inhibited when
a 3V battery is connected to the device and V
CC
is V
TP
. However, the timekeeping
function continues unaffected by the lower input voltage. As V
CC
falls below V
BAT
, the
RAM and RTC are switched over to the external power supply (nominal 3.0V DC) at
V
BAT
.
46 X1
47 X2
Connections for Standard 32.768kHz Quartz Crystal. The internal oscillator circuitry is
designed for operation with a crystal having a specified load capacitance (C
L
) of 6pF. For
more information about crystal selection and crystal layout considerations, refer to
Application Note 58: Crystal Considerations with Dallas Real-Time Clocks. The DS1558
can also be driven by an external 32.768kHz oscillator. In this configuration, the X1 pin
is connected to the external oscillator signal and the X2 pin is floated.
TYPICAL OPERATING CIRCUIT
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18

DS1558W-TRL

Mfr. #:
Buy DS1558W-TRL
Manufacturer:
Maxim Integrated
Description:
Real Time Clock
Lifecycle:
New from this manufacturer.
Delivery:
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