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STP40NF10
P1-P3
P4-P6
P7-P9
P10-P12
STP40NF10
Electrical character
istics
Doc ID 11096 Rev
5
7/12
Figure 8.
Gate char
g
e vs. gate-sour
ce v
oltage
Figure 9.
Capacitance v
ariations
Figure 10
.
Normal
ized gat
e threshol
d v
oltage
vs. temperature
Figure 11
.
Normaliz
ed on resi
stance vs
.
temperature
Figure 12.
Sour
ce-drain diode forwar
d
characte
ristics
Figure 13.
Normalized breakdo
wn v
oltage
vs. Tj
Test circuit
STP40NF10
8/12
Doc ID 11096 Rev 5
3
T
est circuit
Figure 14.
Switching times test cir
cuit f
or
resistive l
oad
Figure 15.
Gate c
harge test cir
cuit
Figure 16.
T
est circuit for inductive load
switc
hing and diode recovery times
Figure 17.
Unc
lamped Inductive l
oad test
circuit
Figure 18.
Unc
lamped inductive wa
vefo
rm
Figure 19.
Switching time wa
veform
AM0146
8
v1
V
G
S
P
W
V
D
R
G
R
L
D.
U
.
T
.
2200
μ
F
3
.
3
μ
F
V
DD
AM01469v1
V
DD
47k
Ω
1k
Ω
47k
Ω
2.7k
Ω
1k
Ω
12V
V
i
=20V=V
GMAX
2200
μ
F
P
W
I
G
=CON
S
T
100
Ω
100nF
D.
U
.
T
.
V
G
AM01470v1
A
D
D.
U
.
T.
S
B
G
25
Ω
A
A
B
B
R
G
G
FA
S
T
DIODE
D
S
L=100
μ
H
μ
F
3
.
3
1000
μ
F
V
DD
AM01471v1
V
i
P
w
V
D
I
D
D.
U
.
T.
L
2200
μ
F
3
.
3
μ
F
V
DD
AM01472v1
V
(BR)D
SS
V
DD
V
DD
V
D
I
DM
I
D
AM0147
3
v1
V
D
S
t
on
td
on
td
off
t
off
t
f
t
r
90
%
10
%
10
%
0
0
90
%
90
%
10
%
V
G
S
STP40NF10
Package mechanica
l data
Doc ID 11096 Rev
5
9/12
4
P
ac
kage mechanical data
In order to meet en
vironmental requirements
, ST off
ers these de
vices in different g
rades of
ECOP
A
CK
®
pac
kages, depend
ing on their le
v
el of environment
al compliance. ECO
P
A
CK
®
specifications
, grade def
initions and product status are a
vailab
le at: www
.st.com. ECO
P
A
CK
is an ST tradema
rk.
P1-P3
P4-P6
P7-P9
P10-P12
STP40NF10
Mfr. #:
Buy STP40NF10
Manufacturer:
STMicroelectronics
Description:
MOSFET N-Ch 100 Volt 50 Amp
Lifecycle:
New from this manufacturer.
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STP40NF10