CY7C024AV/025AV/026A
V
CY7C0241AV/0251AV/036A
V
Document #: 38-06052 Rev. *B Page 7 of 19
Table 1. Non-Contending Read/Write
Inputs Outputs
OperationCE
R/W OE UB LB SEM I/O
9
I/O
17
I/O
0
I/O
8
H X X X X H High Z High Z Deselected: Power-Down
XXXH H HHigh Z High Z Deselected: Power-Down
L L X L H H Data In High Z Write to Upper Byte Only
L L X H L H High Z Data In Write to Lower Byte Only
L L X L L H Data In Data In Write to Both Bytes
L H L L H H Data Out High Z Read Upper Byte Only
L H L H L H High Z Data Out Read Lower Byte Only
L H L L L H Data Out Data Out Read Both Bytes
X X H X X X High Z High Z Outputs Disabled
H H L X X L Data Out Data Out Read Data in Semaphore Flag
X H L H H L Data Out Data Out Read Data in Semaphore Flag
H X X X L Data In Data In Write D
IN0
into Semaphore Flag
X X H H L Data In Data In Write D
IN0
into Semaphore Flag
LXXL X L Not Allowed
LXXX L L Not Allowed
Table 2. Interrupt Operation Example (assumes BUSY
L
= BUSY
R
= HIGH)
[9]
Left Port Right Port
Function R/W
L
CE
L
OE
L
A
0L–13L
INT
L
R/W
R
CE
R
OE
R
A
0R–13R
INT
R
Set Right INT
R
Flag L L X FFF
[12]
X X X X X L
[11]
Reset Right INT
R
Flag X X X X X X L L FFF (or 1/3FFF) H
[10]
Set Left INT
L
Flag X X X X L
[10]
L L X 1FFE (or
1/3FFE)
X
Reset Left INT
L
Flag X L L 1FFE
[12]
H
[11]
X X X X X
Table 3. Semaphore Operation Example
Function I/O
0
I/O
17
Left I/O
0
I/O
17
Right Status
No action 1 1 Semaphore-free
Left port writes 0 to semaphore 0 1 Left Port has semaphore token
Right port writes 0 to semaphore 0 1 No change. Right side has no write access to semaphore
Left port writes 1 to semaphore 1 0 Right port obtains semaphore token
Left port writes 0 to semaphore 1 0 No change. Left port has no write access to semaphore
Right port writes 1 to semaphore 0 1 Left port obtains semaphore token
Left port writes 1 to semaphore 1 1 Semaphore-free
Right port writes 0 to semaphore 1 0 Right port has semaphore token
Right port writes 1 to semaphore 1 1 Semaphore free
Left port writes 0 to semaphore 0 1 Left port has semaphore token
Left port writes 1 to semaphore 1 1 Semaphore-free
Notes:
9. See Functional Description for specific highest memory locations by device.
10. If BUSY
R
=L, then no change.
11. If BUSY
L
=L, then no change.
12. See Functional Description for specific addresses by device.
CY7C024AV/025AV/026A
V
CY7C0241AV/0251AV/036A
V
Document #: 38-06052 Rev. *B Page 8 of 19
Maximum Ratings
[13]
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................–65
°C to +150°C
Ambient Temperature with
Power Applied.............................................–55
°C to +125°C
Supply Voltage to Ground Potential............... –0.5V to +4.6V
DC Voltage Applied to
Outputs in High-Z State............................–0.5V to V
CC
+0.5V
DC Input Voltage
[14]
.................................–0.5V to V
CC
+0.5V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage........................................... >2001V
Latch-up Current..................................................... >200 mA
Operating Range
Range Ambient Temperature V
CC
Commercial 0°C to +70°C 3.3V ± 300 mV
Industrial
[15]
–40°C to +85°C 3.3V ± 300 mV
Electrical Characteristics Over the Operating Range
Parameter Description
CY7C024AV/025AV/026AV
CY7C0241AV/0251AV/036AV
Unit
-20 -25
Min. Typ. Max. Min. Typ. Max.
V
OH
Output HIGH Voltage (V
CC
=3.3V) 2.4 2.4 V
V
OL
Output LOW Voltage 0.4 0.4 V
V
IH
Input HIGH Voltage 2.0 2.0 V
V
IL
Input LOW Voltage 0.8 0.8 V
I
OZ
Output Leakage Current –10 10 –10 10 µA
I
IX
Input Leakage Current –10 10 –10 10 µA
I
CC
Operating Current (V
CC
= Max., I
OUT
=0
mA) Outputs Disabled
Com’l. 120 175 115 165 mA
Ind.
[15]
135 185 mA
I
SB1
Standby Current (Both Ports TTL Level)
CE
L
& CE
R
V
IH
, f = f
MAX
Com’l. 35 45 30 40 mA
Ind.
[15]
40 50 mA
I
SB2
Standby Current (One Port TTL Level) CE
L
| CE
R
V
IH
, f = f
MAX
Com’l. 75 110 65 95 mA
Ind.
[15]
75 105 mA
I
SB3
Standby Current (Both Ports CMOS Level)
CE
L
& CE
R
V
CC
0.2V, f = 0
Com’l. 10 500 10 500 µA
Ind.
[15]
10 500 µA
I
SB4
Standby Current (One Port CMOS Level)
CE
L
| CE
R
V
IH
, f = f
MAX
[16]
Com’l. 70 95 60 80 mA
Ind.
[15]
70 90 mA
Capacitance
[17]
Parameter Description Test Conditions Max. Unit
C
IN
Input Capacitance T
A
= 25°C, f = 1 MHz,
V
CC
= 3.3V
10 pF
C
OUT
Output Capacitance 10 pF
Notes:
13. The Voltage on any input or I/O pin can not exceed the power pin during power-up.
14. Pulse width < 20 ns.
15. Industrial parts are available in CY7C026AV and CY7C036AV only.
16. f
MAX
= 1/t
RC
= All inputs cycling at f = 1/t
RC
(except output enable). f = 0 means no address or control lines change. This applies only to inputs at CMOS level standby I
SB3
.
17. Tested initially and after any design or process changes that may affect these parameters.
CY7C024AV/025AV/026A
V
CY7C0241AV/0251AV/036A
V
Document #: 38-06052 Rev. *B Page 9 of 19
AC Test Loads and Waveforms
3.0V
GND
90%
90%
10%
3ns
3
ns
10%
ALL INPUTPULSES
(a) Normal Load (Load
1)
R1 = 590
3.3V
OUTPUT
R2 = 435
C= 30pF
V
TH
=1.4V
OUTPUT
C=
30pF
(b) Thévenin Equivalent (Load 1)
(c)Three-State Delay(Load 2)
R1 = 590
R2 = 435
3.3V
OUTPUT
C= 5pF
R
TH
= 250
including scope and jig)
(Used for t
LZ
, t
HZ
, t
HZWE
, and t
LZWE
Switching Characteristics Over the Operating Range
[18]
Parameter Description
CY7C024AV/025AV/026AV
CY7C0241AV/0251AV/036AV
Unit
-20 -25
Min. Max. Min. Max.
Read Cycle
t
RC
Read Cycle Time 20 25 ns
t
AA
Address to Data Valid 20 25 ns
t
OHA
Output Hold From Address Change 3 3 ns
t
ACE
[19]
CE LOW to Data Valid 20 25 ns
t
DOE
OE LOW to Data Valid 12 13 ns
t
LZOE
[20, 21, 22]
OE Low to Low Z 3 3 ns
t
HZOE
[20, 21, 22]
OE HIGH to High Z 12 15 ns
t
LZCE
[20, 21, 22]
CE LOW to Low Z 3 3 ns
t
HZCE
[20, 21, 22]
CE HIGH to High Z 12 15 ns
t
PU
[22]
CE LOW to Power-Up 0 0 ns
t
PD
[22]
CE HIGH to Power-Down 20 25 ns
t
ABE
[19]
Byte Enable Access Time 20 25 ns
Write Cycle
t
WC
Write Cycle Time 20 25 ns
t
SCE
[19]
CE LOW to Write End 15 20 ns
t
AW
Address Valid to Write End 15 20 ns
t
HA
Address Hold From Write End 0 0 ns
t
SA
[19]
Address Set-up to Write Start 0 0 ns
t
PWE
Write Pulse Width 15 20 ns
t
SD
Data Set-up to Write End 15 15 ns
Notes:
18. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
I
OI
/I
OH
and 30-pF load capacitance.
19. To access RAM, CE
=L, UB=L, SEM=H. To access semaphore, CE=H and SEM=L. Either condition must be valid for the entire t
SCE
time.
20. At any given temperature and voltage condition for any given device, t
HZCE
is less than t
LZCE
and t
HZOE
is less than t
LZOE
.
21. Test conditions used are Load 3.
22. This parameter is guaranteed but not tested. For information on port-to-port delay through RAM cells from writing port to reading port, refer to Read Timing
with Busy waveform.

CY7C025AV-20AC

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
IC SRAM 128K PARALLEL 100TQFP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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