NCP1015
http://onsemi.com
15
Figure 25. The Drain−Source Wave Shall Always be Positive . . .
1.004M 1.011M 1.018M 1.025M 1.032M
−50.0
50.0
150
250
350
> 0 !!
As a result, the Flyback voltage which is reflected on
the drain at the switch opening cannot be larger than
the input voltage. When selecting components, you
thus must adopt a turn ratio which adheres to the
following equation:
N @ (V
out
) V
f
) t V
IN(min)
(eq. 14)
For instance, if you operate from a 120 V dc rail and
you deliver 12 V, we can select a reflected voltage of
100 VDC maximum: 120 − 100 > 0. Therefore, the
turn ratio Np : Ns must be smaller than 100 / (12 +
1) = 7.7 or Np : Ns < 7.7. We will see later on how
it affects the calculation.
2. Current−mode architecture is, by definition,
sensitive to subharmonic oscillations.
Subharmonic oscillations only occur when the
SMPS is operating in Continuous Conduction
Mode (CCM) together with a duty−cycle greater
than 50%. As a result, we recommend operating
the device in DCM only, whatever duty−cycle it
implies (max. = 65%).
3. Lateral Mosfets have a poorly doped body−diode
which naturally limits their ability to sustain the
avalanche. A traditional RCD clamping network
shall thus be installed to protect the MOSFET. In
some low power applications, a simple capacitor
can also be used since:
V
DRAIN(max)
+ V
in
) N @ (V
out
) V
f
) ) I
p
@
L
f
C
tot
Ǹ
(eq. 15)
where L
f
is the leakage inductance, C
tot
the total
capacitance at the drain node (which is increased by
the capacitor you will wire between drain and
source), N the Np : Ns turn ratio, V
out
the output
voltage, V
f
the secondary diode forward drop and
finally, I
p
the maximum peak current. Worse case
occurs when the SMPS is very close to regulation,
e.g. the V
out
target is almost reached and I
p
is still
pushed to the maximum.
Taking into account all previous remarks, it becomes
possible to calculate the maximum power that can be
transferred at low line:
When the switch closes, V
in
is applied across the primary
inductance L
p
until the current reaches the level imposed by
the feedback loop. The duration of this event is called the ON
time and can be defined by:
t
on
+
L
p
@ I
p
V
in
(eq. 16)
At the switch opening, the primary energy is transferred
to the secondary and the flyback voltage appears across L
p
,
reseting the transformer core with a slope of:
N @ (V
out
) V
f
)
L
p
@ t
off
the t
off
time is thus:
t
off
+
L
p
@ I
p
N @ (V
out
) V
f
)
(eq. 17)
If one wants to keep DCM only, but still need to pass the
maximum power, we will not allow a dead−time after the
core is reset, but rather immediately re−start. The switching
time t
sw
can be expressed by:
t
sw
+ t
off
) t
on
+ L
p
@ I
p
@
1
V
in
)
1
N @ (V
out
) V
f
)
(eq. 18)
The Flyback transfer formula dictates that:
P
out
h
+
1
2
@ L
p
@ I
p
2
@ f
sw
(eq. 19)
which, by extracting I
p
and plugging into Equation 19 leads to:
t
sw
+ L
p
2 @ P
out
h @ f
sw
@ L
p
Ǹ
@
ǒ
1
V
in
)
1
N @ (V
out
) V
f
)
Ǔ
(eq. 20)
Extracting L
p
from Equation 20 gives: