Document Number: 001-50045 Rev. *J Page 4 of 16
Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. User guidelines are not tested.
Storage temperature ................................–65 °C to +150 °C
Ambient temperature with power applied ...55 °C to +125 °C
Supply voltage to ground potential ................ –0.5 V to 6.0 V
DC voltage applied to outputs
in high Z state
[3, 4]
........................................ –0.5 V to 6.0 V
DC input voltage
[3, 4]
....................................–0.5 V to 6.0 V
Output current into outputs (low) .................................20 mA
Static discharge voltage
(MIL-STD-883, Method 3015) .................................> 2001 V
Latch-up current .....................................................> 200 mA
Operating Range
Device Range
Ambient
Temperature
V
CC
[5]
CY62148ESL Industrial /
Automotive-A
–40 °C to +85 °C 2.2 V to 3.6 V,
and
4.5 V to 5.5 V
Electrical Characteristics
Over the operating range
Parameter Description Test Conditions
55 ns (Industrial/Automotive-A)
Unit
Min Typ
[6]
Max
V
OH
Output HIGH voltage 2.2 < V
CC
< 2.7 I
OH
= –0.1 mA 2.0 – – V
2.7 < V
CC
< 3.6 I
OH
= –1.0 mA 2.4 – –
4.5 <
V
CC
< 5.5 I
OH
= –1.0 mA 2.4 – –
4.5 <
V
CC
< 5.5 I
OH
= –0.1 mA – – 3.4
[7]
V
OL
Output LOW voltage 2.2 < V
CC
< 2.7 I
OL
= 0.1 mA – – 0.4 V
2.7 <
V
CC
< 3.6 I
OL
= 2.1 mA – – 0.4
4.5 <
V
CC
< 5.5 I
OL
= 2.1 mA – – 0.4
V
IH
Input HIGH voltage 2.2 < V
CC
< 2.7 1.8 – V
CC
+ 0.3 V
2.7 <
V
CC
< 3.6 2.2 – V
CC
+ 0.3
4.5 <
V
CC
< 5.5 2.2 – V
CC
+ 0.5
V
IL
[8]
Input LOW voltage 2.2 < V
CC
< 2.7 –0.3 – 0.4 V
2.7 <
V
CC
< 3.6 –0.3 – 0.6
4.5 <
V
CC
< 5.5 –0.5 – 0.6
I
IX
Input leakage current GND < V
IN
< V
CC
–1 – +1 µA
I
OZ
Output leakage current GND < V
O
< V
CC
, output disabled –1 – +1 µA
I
CC
V
CC
operating supply current f = f
max
= 1/t
RC
V
CC
= V
CCmax
I
OUT
= 0 mA,
CMOS levels
–1520mA
f = 1 MHz – 2 2.5
I
SB1
[9]
Automatic CE power-down
current – CMOS inputs
CE
> V
CC
–0.2 V,
V
IN
>
V
CC
– 0.2 V or V
IN
< 0.2 V,
f = f
max
(address and data only),
f = 0 (OE
and WE),
V
CC
= V
CC(max)
–17µA
–
I
SB2
[9]
Automatic CE power-down
current – CMOS inputs
CE
> V
CC
– 0.2 V,
V
IN
> V
CC
– 0.2 V or V
IN
< 0.2 V,
f = 0, V
CC
=
V
CC(max)
–17µA
–
Notes
3. V
IL(min)
= –2.0 V for pulse durations less than 20 ns.
4. V
IH(max)
= V
CC
+ 0.75 V for pulse durations less than 20 ns.
5. Full device AC operation assumes a minimum of 100 µs ramp time from 0 to V
CC(min)
and 200 µs wait time after V
CC
stabilization.
6. Typical values are included for reference and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, T
A
= 25 °C.
7. Please note that the maximum VOH limit does not exceed minimum CMOS VIH of 3.5 V. If you are interfacing this SRAM with 5 V legacy processors that require a
minimum VIH of 3.5 V, please refer to Application Note AN6081 for technical details and options you may consider
8. Under DC conditions the device meets a V
IL
of 0.8 V (for V
CC
range of 2.7 V to 3.6 V and 4.5 V to 5.5 V) and 0.6 V (for V
CC
range of 2.2 V to 2.7 V). However, in
dynamic conditions Input LOW voltage applied to the device must not be higher than 0.6 V and 0.4 V for the above ranges.
9. Chip enable (CE
) must be HIGH at CMOS level to meet the I
SB1
/ I
SB2
/ I
CCDR
spec. Other inputs can be left floating.
