PCA9507_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 7 February 2008 12 of 20
NXP Semiconductors
PCA9507
2-wire serial bus extender for HDMI DDC I
2
C-bus and SMBus
[1] LOW-level supply voltage.
[2] V
IL
specification is for the first LOW level seen by the SDAB/SCLB lines. V
ILc
is for the second and subsequent LOW levels seen by the
SDAB/SCLB lines.
[3] V
IL
for port A with envelope noise must be below 0.3V
CC(A)
for stable performance.
10. Dynamic characteristics
[1] Times are specified with loads of 1.35 kΩ pull-up resistance and 57 pF load capacitance on port B, and 450 Ω pull-up resistance and
57 pF load capacitance on port A. Different load resistance and capacitance will alter the RC time constant, thereby changing the
propagation delay and transition times.
[2] Pull-up voltages are V
CC(A)
on port A and V
CC(B)
on port B.
[3] Typical values were measured with V
CC(A)
= 3.3 V at T
amb
=25°C, unless otherwise noted.
[4] The t
PLH
delay data from port B to port A is measured at 0.5 V on port B to 0.3V
CC(A)
on port A.
[5] The proportional delay data from port A to port B is measured at 0.3V
CC(A)
on port A to 0.3V
CC(B)
on port B.
[6] The enable pin, EN, should only change state when the global bus and the repeater port are in an idle state.
Enable
V
IL
LOW-level input voltage −0.5 - +0.3V
CC(B)
V
V
IH
HIGH-level input voltage 0.7V
CC(B)
- 5.5 V
I
IL(EN)
LOW-level input current on pin
EN
V
I
= 0.2 V, EN; V
CC
= 3.6 V - −10 −30 µA
I
LI
input leakage current V
I
=V
CC
−1-+1 µA
C
i
input capacitance V
I
= 3.0 V or 0 V - 6 7 pF
Table 5. Static characteristics
…continued
V
CC
=2.7V to 5.5V; GND=0V; T
amb
=
−
40
°
Cto+85
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Table 6. Dynamic characteristics
V
CC
=2.7V to 5.5V; GND=0V; T
amb
=
−
40
°
Cto+85
°
C; unless otherwise specified.
[1][2]
Symbol Parameter Conditions Min Typ
[3]
Max Unit
t
PLH
LOW-to-HIGH propagation delay port B to port A; Figure 15
[4]
90 165 350 ns
t
PHL
HIGH-to-LOW propagation delay port B to port A; Figure 13 55 91 180 ns
t
TLH
LOW to HIGH output transition time port A; Figure 13 22 48 80 ns
t
THL
HIGH to LOW output transition time port A; Figure 13 20 42 100 ns
t
PLH
LOW-to-HIGH propagation delay port A to port B; Figure 14
[5]
140 218 310 ns
t
PHL
HIGH-to-LOW propagation delay port A to port B; Figure 14
[5]
130 91 330 ns
t
TLH
LOW to HIGH output transition time port B; Figure 14 100 173 260 ns
t
THL
HIGH to LOW output transition time port B; Figure 14 20 39 100 ns
t
su
set-up time EN HIGH before START condition
[6]
100 - - ns
t
h
hold time EN HIGH after STOP condition
[6]
100 - - ns
