4
FN7445.0
December 13, 2006
t
D
fall CTL to OUT Falling Prop Delay 1k from DRN to 8V, V
CTL
= 3V to 0V step,
no load on OUT, measured from V
CTL
= 1.5V
to OUT = 80%
100 ns
V
SRC
SRC Input Voltage Range 30 V
ISRC SRC Input Current Start-up sequence not completed 0.2 1.25 mA
Start-up sequence completed 150 250 µA
R
ON
SRC SRC On Resistance Start-up sequence completed 5 14
R
ON
DRN DRN On Resistance Start-up sequence completed 30 60
R
ON
COM COM to GND On Resistance Start-up sequence not completed 400 1000 1800
SEQUENCING
t
ON
Turn On Delay C
DLY
= 0.22µF 30 ms
t
SS
Soft-start Time C
DLY
= 0.22µF 2 ms
t
DEL1
Delay Between A
VDD
and V
OFF
C
DLY
= 0.22µF 10 ms
t
DEL2
Delay Between V
ON
and V
OFF
C
DLY
= 0.22µF 17 ms
t
DEL3
Delay Between V
OFF
and Delayed
V
BOOST
C
DLY
= 0.22µF 10 ms
I
DELB_ON
DELB Pull-Down Current or Resistance
when Enabled by the Start-Up
Sequence
V
DELB
> 0.9V 35 50 65 µA
V
DELB
< 0.9V 1.2 1.6 2 K
I
DELB_OFF
DELB Pull-Down Current or Resistance
when Disabled
VDELB < 20V 500 nA
FAULT DETECTION
T
FAULT
Fault Time Out C
DLY
= 0.22µF 50 ms
OT Over-temperature Threshold 140 °C
LOGIC
V
HI
Logic High Threshold 2.2 V
V
LO
Logic Low Threshold 0.8 V
I
LOW
Logic Low Bias Current 0.1 µA
I
HIGH
Logic High Bias Current 16 23 30 µA
Electrical Specifications V
IN
= 5V, A
VDD
= 15V, V
ON
= 20V, V
OFF
= -9V, V
LOGIC
= 3V, Over Temperature from -40°C to +85°C
PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNIT
ISL97522
